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Edexcel GCSE Computer Science (1CP2) Exam Questions

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10 questions · 20 marks

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1Multiple choice1 markEmbedded Systems Swap Remove

Identify the device that is a general purpose computer.

[1 mark]
  • ADesktop computer
  • BMicrowave oven
  • CWashing machine
  • DTraffic light
Mark scheme
  • A Desktop computer (1)
  • The only correct answer is A. The correct answer is Desktop computer.
  • B is not correct because a microwave oven uses an embedded system, built into it, to control a dedicated function
  • C is not correct because a washing machine uses an embedded system, built into it, to control a dedicated function
  • D is not correct because a traffic light uses an embedded system, built into it, to control a dedicated function
Example answers and how they were marked
Full marks1/1

A Desktop computer

Why: Correct option: the question asks for the general purpose computer, and a desktop computer is general purpose; it does not use an embedded system to control a dedicated function (1).

No marks0/1

B Microwave oven

Why: Near miss: a microwave oven is the kind of device that uses an embedded system, built into it, to control a dedicated function, so it is not a general purpose computer; mark scheme says B is not correct.

No marks0/1

C Washing machine

Why: Misconception: because a washing machine contains a computer, it must be a general purpose computer; it actually uses an embedded system built into it for a dedicated function, so no mark.

2Multiple choice1 markFetch Decode Execute Cycle Swap Remove

Identify the bus that carries memory addresses from the CPU to main memory. (1)

[1 mark]
  • AAddress bus
  • BControl bus
  • CData bus
  • DProgram counter
Mark scheme
  • A Address bus (1)
  • The only correct answer is A. The correct answer is address bus.
  • B is not correct because the control bus carries control signals
  • C is not correct because the data bus carries data and instructions
  • D is not correct because the program counter holds the address of the next instruction, it does not carry addresses
Example answers and how they were marked
Full marks1/1

A Address bus

Why: Correct option: the address bus carries memory addresses from the CPU to main memory (1).

No marks0/1

C Data bus

Why: Near-miss distractor: the data bus carries data and instructions between the CPU and main memory, not memory addresses (0).

No marks0/1

D Program counter

Why: Misconception: the program counter is a register that holds the address of the next instruction, it does not carry addresses to main memory (0).

3Multiple choice1 markFetch Decode Execute Cycle Swap Remove

Identify the component that stores instructions and data during the fetch-decode-execute cycle.

[1 mark]
  • AArithmetic logic unit
  • BClock
  • CMain memory (RAM)
  • DProgram counter
Mark scheme
  • C Main memory (RAM) (1)
  • The only correct answer is C. The correct answer is main memory (RAM); accept 'main memory', 'RAM' or 'random access memory'.
  • A is not correct because the arithmetic logic unit performs arithmetic and logical operations
  • B is not correct because the clock sends regular pulses to synchronise the components of the CPU
  • D is not correct because the program counter holds the address of the next instruction, not the instructions and data
Example answers and how they were marked
Full marks1/1

C Main memory (RAM)

Why: Correct option: main memory (RAM) stores instructions and data during the fetch-decode-execute cycle (1).

No marks0/1

D Program counter

Why: Near-miss distractor: the program counter holds the address of the next instruction, not the instructions and data (0).

No marks0/1

A Arithmetic logic unit

Why: Misconception: the ALU performs arithmetic and logical operations, so it does not store instructions and data (0).

4Multiple choice1 markSecondary Memory Swap Remove

A computer has both primary and secondary storage.

Identify the role of secondary storage.

[1 mark]
  • ATo store data and programs permanently
  • BTo store data and instructions currently in use
  • CTo carry out calculations on data
  • DTo allow the CPU to access programs directly
Mark scheme
  • A To store data and programs permanently (1)
  • The only correct answer is A. The correct answer is to store data and programs permanently.
  • B is not correct because storing the data and instructions currently in use is the role of primary storage/RAM, which is volatile, not the role of secondary storage
  • C is not correct because calculations on data are carried out by the CPU, not by secondary storage
  • D is not correct because secondary storage is not directly accessible by the CPU; data must first be copied into RAM
Example answers and how they were marked
Full marks1/1

A To store data and programs permanently

Why: Correct option (1): storing data and programs permanently is the role of secondary storage, which is non-volatile.

No marks0/1

B To store data and instructions currently in use

Why: Near miss scoring 0: this describes primary storage/RAM, which is volatile, and is not the role of secondary storage (line B of the mark scheme). Only A is credited.

No marks0/1

D To allow the CPU to access programs directly

Why: Misconception scoring 0: candidates think the CPU reads programs straight from secondary storage, but secondary storage is not directly accessible by the CPU (line D).

5Short recall2 marksPrimary Memory Swap Remove

An application's instructions and data are copied from secondary storage into RAM before it runs.

Give two reasons why the instructions and data are copied into RAM rather than being read directly from secondary storage.

[2 marks]
Mark scheme

Award one mark for any of the following up to a maximum of two marks:

  • RAM can be accessed/read (much) faster than secondary storage / secondary storage is (much) slower than RAM (1)
  • The CPU would have to wait/idle if instructions and data were read directly from secondary storage (1)
  • The CPU can access RAM directly / RAM is directly accessible to the CPU (1)

Allow hard disk / hard drive / SSD for secondary storage.

Do not accept RAM is volatile / so that instructions and data are not lost when the power is switched off.

Do not accept the computer runs faster / has more storage (without reference to the CPU accessing instructions and data).

Example answers and how they were marked
Full marks2/2

RAM can be accessed much faster than secondary storage, so the CPU would have to wait for its instructions if they were read from the hard disk.

Why: Creditworthy point that RAM is accessed/read faster than secondary storage (1) and the linked point that the CPU would wait/idle without this (1).

Some marks1/2

RAM can be read faster than the hard disk.

Why: Gives one creditworthy reason, that RAM is accessed/read faster than secondary storage (1), but does not say why this matters to the CPU, so the second mark is not earned.

No marks0/2

So that the data is not lost when the computer is switched off.

Why: RAM is volatile, so keeping data when the power is off is not a reason for using RAM; this is the misconception in the Do not accept line and scores nothing.

6Describe2 marksStored Program Computers Swap Remove

A computer is based on the von Neumann stored program concept.

Describe how the CPU uses main memory (RAM) during the fetch-decode-execute cycle.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • The program's instructions (and the data it uses) are held in main memory/RAM (1) so the CPU fetches both the instructions and the data from that one memory (1)
  • The CPU fetches the next instruction from main memory/RAM (1) using the address of the memory location that holds it (1)
  • The CPU reads/fetches data from main memory/RAM (1) when an instruction needs it and writes the result back to main memory/RAM (1)
  • The program's instructions are held in main memory/RAM while the program runs (1) and the CPU fetches them one at a time/one after another to be decoded and executed (1)

Allow 'memory' for main memory/RAM.

Allow 'gets' for fetches/reads.

For both marks, the development must say what the CPU does with the contents of main memory (fetches/reads/writes), not just that main memory is used.

Do not accept answers about the program being stored in secondary storage, such as on a hard drive, or about it being loaded from there.

Do not accept benefits such as the computer running faster or being easier for the user.

Do not accept naming CPU components (control unit, arithmetic logic unit, registers) or buses on their own, without saying what is stored or fetched.

Do not accept 'the computer stores data' on its own, without a link to the instructions of a program.

Example answers and how they were marked
Full marks2/2

The program's instructions and the data it uses are both held in the same main memory (RAM) (1), so the CPU can fetch the instructions and the data it needs from that one memory (1).

Why: Linked point (1) that instructions and data are stored together in main memory, with the development (1) that the CPU fetches both from the same memory.

Some marks1/2

The CPU fetches the instructions from main memory (1) so that they are processed more quickly (1).

Why: The first point earns (1) for the CPU fetching instructions from main memory. The second statement is a benefit (speed), which the 'Do not accept benefits' line rules out, so it earns nothing.

No marks0/2

The control unit decodes each instruction (1) and the ALU carries out the calculations (1).

Why: Both statements name CPU components without saying what is stored, fetched or written, which the mark scheme tells examiners not to accept, so neither earns a mark.

7Describe2 marksStored Program Computers Swap Remove

The control unit (CU) is a component inside the CPU.

Describe the role of the control unit in the fetch-decode-execute cycle.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • Decodes each (fetched) instruction (1) to work out which operation is needed / which components should carry it out (1)
  • Coordinates/directs the other components (1) by sending control signals along the control bus (1)
  • Fetches the next instruction (1) by sending its address to main memory along the address bus (1)
  • Sends a read/write control signal to main memory (1) so that the instruction or data is transferred during the fetch/execute stage (1)

Do not accept answers about synchronising the CPU or timing the cycles (that is the role of the clock).

Do not accept answers about carrying out arithmetic or logical operations (that is the ALU).

Do not accept answers about holding data or the results of instructions (that is registers/main memory).

Do not accept generic answers that only say the CU controls the CPU or processes instructions, with no linked development.

Only award one mark for a response that only repeats that the CU sends control signals; the second mark needs a linked outcome such as coordination, a memory read/write, or fetching an instruction.

Do not accept 'during the decode stage' as the development for the decoding point, as it restates the question.

Example answers and how they were marked
Full marks2/2

It decodes the instruction that has been fetched (1) so that it knows which operation the CPU must carry out and which components should do it (1).

Why: Decoding named with the acceptable wording 'each (fetched) instruction' (1), plus the linked development that this identifies the operation and components (1).

Some marks1/2

It decodes each instruction during the decode stage of the cycle.

Why: Earns (1) for decoding the instruction. 'During the decode stage' restates the question and is not accepted as a development, so the second mark is not earned.

No marks0/2

It carries out the calculations and comparisons when the instruction is executed.

Why: Calculations and comparisons are the ALU's role, which the 'Do not accept' line rules out, so no mark is earned.

8Explain2 marksSecondary Memory Swap Remove

A hard disk drive stores data on a spinning magnetic platter.

Explain how data is read from a magnetic hard disk.

[2 marks]
Mark scheme

Award up to two marks for a linked explanation such as:

  • The read/write head moves over the surface of the platter (1) and detects whether each area of the disk is magnetised (1)
  • The platter spins/rotates (1) so the read/write head can pass over the whole surface/tracks of the disk (1)
  • The pattern of magnetised and non-magnetised areas detected by the read/write head (1) is read as binary 1s and 0s (1)
  • The drive head detects the direction of magnetisation of each area (1) so the data can be read as binary (1)

For both marks, the expansion must follow/associate with the statement.

Allow one mark for stating that data is read magnetically / that the read/write head detects the magnetisation of the disk without a linked reason.

Do not accept answers that describe how data is written to the disk, such as the head magnetising the platter, rather than how it is read.

Do not accept 'a laser reads the pits and lands' - this describes optical storage, not magnetic storage.

Example answers and how they were marked
Full marks2/2

The platter rotates so the read/write head passes over the whole surface of the disk (1) and it detects whether each area is magnetised or not (1). The pattern of magnetised areas is then read as 1s and 0s.

Why: Linked point (1) rotation of the platter with reason (1) the head reaches the whole surface, and the second line about magnetised areas is also present.

Some marks1/2

The read/write head detects the magnetic charges on the disk.

Why: Allow line (1): states the head detects the magnetisation of the disk, but gives no linked reason (e.g. the platter rotating so the head covers the whole surface), so only one mark.

No marks0/2

A laser shines onto the disk and reads the pits and lands, then the data is sent to the CPU.

Why: Describes optical storage. Do not accept 'a laser reads the pits and lands' - a magnetic disk is read by a head detecting magnetisation.

9Explain2 marksSecondary Memory Swap Remove

A memory stick uses solid state storage.

Explain how data is stored in solid state storage.

[2 marks]
Mark scheme

Award up to two marks for a linked explanation such as:

  • Data is stored as electric charges (1) which are trapped/held in the memory cells/chips (1)
  • A current forces electrons through a barrier (1) and they stay trapped on the other side until another current/'flash' is applied (1)
  • A cell that is holding trapped electrons/a charge represents a 1 (1) and a cell with no charge represents a 0 (1)

For both marks, the expansion must follow/associate with the statement.

Allow one mark for stating that data is stored as electric charges/electrons without a linked reason.

Do not accept 'there are no moving parts' or 'it is fast/durable' - these are characteristics of solid state storage, not how data is stored.

Do not accept 'data is stored magnetically' or 'as pits and lands'.

Example answers and how they were marked
Full marks2/2

Data is stored as electric charges (1). A current forces electrons through a barrier and traps them, and a cell with a trapped charge represents a 1 while a cell with no charge represents a 0 (1).

Why: Linked point (1) data stored as electric charges with reason (1) electrons forced through a barrier and trapped, and the charge representing the binary values.

Some marks1/2

Data is stored as electric charges.

Why: Allow line (1): states that data is stored as electric charges, but gives no linked reason (how the charges are trapped or how they represent 1s and 0s), so only one mark.

No marks0/2

The data is stored on the chips using tiny magnets, in the same way as a hard disk.

Why: Misconception. Do not accept 'data is stored magnetically' - solid state storage stores data as electric charges, not magnetic patterns.

10Discuss6 marksStored Program Computers Swap Remove

A school is buying new desktop computers for its computer science classroom. The teacher explains that each computer uses the von Neumann stored program concept: the program instructions and the data are stored together in main memory, and the CPU runs each instruction by carrying out the fetch-decode-execute cycle.

Discuss the role of the control unit, the arithmetic logic unit (ALU) and registers in the fetch-decode-execute cycle.

Your answer should include:

  • how an instruction is fetched from main memory and decoded
  • how the ALU executes an instruction
  • how registers are used during the cycle.
[6 marks]
Mark scheme

Indicative content

Fetching and decoding an instruction

  • The register that holds the address of the next instruction (the program counter) contains the address of the instruction to be fetched.
  • This address is sent to main memory (RAM) and the instruction is copied from main memory into a register inside the CPU.
  • The program counter is updated so that it holds the address of the next instruction in the program.
  • The control unit decodes the instruction that has been fetched, working out which operation is required and which data or registers are needed.
  • The control unit sends control signals to coordinate the other components as the instruction is carried out.
  • The control unit decides what happens next, for example after a comparison it decides whether the next instruction is the following one or a jump.

The arithmetic logic unit (ALU) executes an instruction

  • The control unit directs the arithmetic logic unit (ALU) to carry out the operation.
  • The ALU performs arithmetic operations such as addition, subtraction, multiplication and division, for example adding two values in a program written by the class.
  • The ALU performs logical operations such as comparing two values to see if they are equal or whether one is greater than the other.
  • The result of the operation carried out by the ALU is passed back and stored in a register.
  • The ALU operates on data that has been fetched from main memory; it does not fetch the instruction and it does not decide which instruction is next.

Registers

  • Registers are small, very fast memory locations inside the CPU.
  • They hold the data, addresses and results that the CPU is working on during the cycle.
  • Registers are used in every stage of the cycle, not only when the ALU produces a result.
  • Because registers are inside the CPU they can be read and written much faster than main memory during the cycle.

Levels

  • Level 0 (0 marks): No rewardable content.
  • Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
  • Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
  • Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)
  • A Level 3 answer must link the roles of all three components to the fetch, decode and execute stages. An answer that links only one component to a stage, with the other points listed separately, is Level 1 (1–2 marks); an answer that links two of the components to stages is Level 2 (3–4 marks). A point repeated under more than one heading is credited once only.
  • Accept 'the program counter', 'the address register' or 'a register holding the address of the next instruction' as the register that holds the address of the next instruction. Do not accept 'the control unit performs the calculations', 'the ALU controls the timing of the CPU' / 'the ALU sends the clock signal' or 'registers are in main memory (RAM)'.
Example answers and how they were marked
Full marks6/6

In the fetch stage, a register called the program counter holds the address of the next instruction and this address is sent to main memory. The instruction is copied from main memory into a register in the CPU and the program counter is updated so that it points to the next instruction. The control unit then decodes the instruction in the decode stage, working out which operation is required and which data or registers are needed, and it sends control signals to coordinate the other components. In the execute stage the control unit directs the ALU to carry out the operation the class's program needs: the ALU does arithmetic, such as adding two values, or a logical comparison, such as checking whether one value is greater than another, and it does not decide what happens next, the control unit does. The result from the ALU is stored in a register, and because registers hold the data, addresses and results at every stage, the cycle can repeat with the next instruction.

Why: Level 3: the role of each component is linked to the stage it works in (program counter and registers in fetch, control unit decoding and deciding next, ALU executing and its result stored in a register) across all three stages, with the classroom context.

Some marks2/6

The control unit decodes the instruction in the decode stage. The ALU does maths and logic, such as addition and comparing numbers. Registers store data inside the CPU. In the fetch stage the instruction is fetched from the RAM and put into the CPU.

Why: Level 1: several correct basic points that the mark scheme credits (the instruction is fetched from main memory into the CPU, the control unit decodes the instruction, the ALU does arithmetic and logical operations, registers store data) but only the control unit is linked to a stage of the cycle, so the answer is top of Level 1.

Some marks1/6

The control unit decodes instructions. The ALU controls the timing of the CPU and sends the clock signal. Registers are in the RAM and they store the program.

Why: Level 1: one basic point, that the control unit decodes instructions (1). The other statements are on the do-not-accept list (the ALU does not control the timing of the CPU or send the clock signal, and registers are in the CPU, not main memory), so they earn no credit.

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