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Edexcel GCSE Computer Science (1CP2) Exam Questions

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10 questions · 24 marks

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1Multiple choice1 markSecondary Memory Swap Remove

A computer has both primary and secondary storage.

Identify the role of secondary storage.

[1 mark]
  • ATo store data and programs permanently
  • BTo store data and instructions currently in use
  • CTo carry out calculations on data
  • DTo allow the CPU to access programs directly
Mark scheme
  • A To store data and programs permanently (1)
  • The only correct answer is A. The correct answer is to store data and programs permanently.
  • B is not correct because storing the data and instructions currently in use is the role of primary storage/RAM, which is volatile, not the role of secondary storage
  • C is not correct because calculations on data are carried out by the CPU, not by secondary storage
  • D is not correct because secondary storage is not directly accessible by the CPU; data must first be copied into RAM
Example answers and how they were marked
Full marks1/1

A To store data and programs permanently

Why: Correct option (1): storing data and programs permanently is the role of secondary storage, which is non-volatile.

No marks0/1

B To store data and instructions currently in use

Why: Near miss scoring 0: this describes primary storage/RAM, which is volatile, and is not the role of secondary storage (line B of the mark scheme). Only A is credited.

No marks0/1

D To allow the CPU to access programs directly

Why: Misconception scoring 0: candidates think the CPU reads programs straight from secondary storage, but secondary storage is not directly accessible by the CPU (line D).

2Multiple choice1 markStored Program Computers Swap Remove

Identify the bus that carries addresses in one direction only, from the CPU to main memory.

[1 mark]
  • AAddress bus
  • BControl bus
  • CData bus
  • DSystem bus
Mark scheme
  • A Address bus (1)
  • The only correct answer is A. The correct answer is address bus. Do not accept 'address' on its own.
  • B is not correct because the control bus carries control signals in both directions between the CPU and other components
  • C is not correct because the data bus carries data in both directions between the CPU and main memory
  • D is not correct because the system bus is the collection of all three buses
Example answers and how they were marked
Full marks1/1

A Address bus

Why: Correct option: the address bus carries addresses in one direction only, from the CPU to main memory (1).

No marks0/1

C Data bus

Why: The data bus carries data in both directions, so it is not the bus that carries addresses in one direction only from the CPU to main memory; no creditworthy point.

No marks0/1

B Control bus

Why: The control bus carries control signals in both directions, not addresses in one direction only; this is the common control/address bus confusion, so no mark.

3Short recall2 marksFetch Decode Execute Cycle Swap Remove

Von Neumann architecture uses the stored program concept.

Define the term stored program concept.

[2 marks]
Mark scheme

Award one mark for any of the following up to a maximum of two marks:

  • Instructions/programs are held/stored in main memory (RAM) (1)
  • The data the program uses is stored in the same memory as the instructions (1)
  • Instructions are fetched (one at a time) from main memory by the CPU (1)
  • Instructions (fetched from main memory) are decoded and executed (1)

Allow 'memory' for main memory/RAM.

Do not award two marks for a single statement that only says the program/instructions are stored in memory.

Do not accept answers that state the program is stored in secondary storage (such as a hard disk).

Example answers and how they were marked
Full marks2/2

The program instructions and the data it uses are both held in main memory, and the CPU fetches each instruction from main memory in turn to decode and execute it.

Why: Instructions/programs are held/stored in main memory (RAM) (1) and the data the program uses is stored in the same memory as the instructions (1). The fetching and executing points are also present but the maximum is two marks.

Some marks1/2

The instructions of a program are stored in main memory.

Why: Instructions/programs are held/stored in main memory (RAM) (1). Only one part of the definition is given, so one mark.

No marks0/2

The program is kept on the hard disk and is loaded when it is needed.

Why: The answer places the program in secondary storage, which the mark scheme says not to accept, so no creditworthy point is given.

4Short recall2 marksPrimary Memory Swap Remove

An application's instructions and data are copied from secondary storage into RAM before it runs.

Give two reasons why the instructions and data are copied into RAM rather than being read directly from secondary storage.

[2 marks]
Mark scheme

Award one mark for any of the following up to a maximum of two marks:

  • RAM can be accessed/read (much) faster than secondary storage / secondary storage is (much) slower than RAM (1)
  • The CPU would have to wait/idle if instructions and data were read directly from secondary storage (1)
  • The CPU can access RAM directly / RAM is directly accessible to the CPU (1)

Allow hard disk / hard drive / SSD for secondary storage.

Do not accept RAM is volatile / so that instructions and data are not lost when the power is switched off.

Do not accept the computer runs faster / has more storage (without reference to the CPU accessing instructions and data).

Example answers and how they were marked
Full marks2/2

RAM can be accessed much faster than secondary storage, so the CPU would have to wait for its instructions if they were read from the hard disk.

Why: Creditworthy point that RAM is accessed/read faster than secondary storage (1) and the linked point that the CPU would wait/idle without this (1).

Some marks1/2

RAM can be read faster than the hard disk.

Why: Gives one creditworthy reason, that RAM is accessed/read faster than secondary storage (1), but does not say why this matters to the CPU, so the second mark is not earned.

No marks0/2

So that the data is not lost when the computer is switched off.

Why: RAM is volatile, so keeping data when the power is off is not a reason for using RAM; this is the misconception in the Do not accept line and scores nothing.

5Short recall2 marksSecondary Memory Swap Remove

Computers have both primary storage and secondary storage.

Define the term secondary storage.

[2 marks]
Mark scheme

Award one mark for any of the following up to a maximum of two marks:

  • (Storage that is) non-volatile / keeps its data when the power is turned off (1)
  • (Storage that is) used to store programs and data/files (for later use) (1)
  • (Storage that is) not directly accessible by the CPU / not directly accessed by the CPU (1)

Allow both the non-volatile point and the stores programs and data point from one sentence if each idea is clearly stated, e.g. 'non-volatile storage that holds programs and data'.

Allow accessed via the CPU / must be copied into RAM before the CPU can use it for the third point.

Do not accept volatile / loses its data when the power is turned off.

Do not accept a description of primary storage, such as RAM or ROM.

Do not accept capacity.

Do not accept an example device on its own (e.g. hard disk drive).

Example answers and how they were marked
Full marks2/2

Secondary storage is non-volatile, so it does not lose data when the power is turned off. It is used to store programs and data files for later use.

Why: Non-volatile / keeps data when the power is off (1) and used to store programs and data files (1), each idea clearly stated.

Some marks1/2

Secondary storage is used to store programs and data files.

Why: Stores programs and data/files (1), but nothing is said about it being non-volatile or not directly accessible by the CPU.

No marks0/2

Secondary storage is volatile memory that holds the data the CPU is using at the moment.

Why: Describes primary storage (RAM) and says it is volatile, which the mark scheme says not to accept, so no marks are awarded.

6Describe2 marksPrimary Memory Swap Remove

Computers use RAM to hold data and instructions while programs run. RAM is volatile.

Describe what this means for the data and instructions that are held in RAM.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • The data and instructions held in RAM are lost/cleared/erased when the power is switched off / is cut (1) so RAM can only hold the data and instructions for programs that are currently running (1)
  • If the power is switched off, the data and instructions held in RAM cannot be read/used by the CPU (1) so a program cannot carry on from where it stopped (1)
  • RAM can only hold the data and instructions for a program while the computer is switched on (1) because it loses its contents / cannot keep them without a continuous power supply (1)

Accept 'RAM needs a continuous power supply' / 'RAM needs power to keep its data and instructions' as an alternative way of saying that the data and instructions in RAM are lost when the power is switched off (1). Do not award a second mark for a response that only repeats that the contents are lost when the power is switched off (e.g. 'the data is gone when the power is off').

Do not accept responses that say the data and instructions in RAM are permanent / are stored when the power is off.

Do not award a mark for responses that say RAM is temporary / temporarily holds data with no reference to the power being switched off.

Do not award a mark for responses that state data is deleted/lost without any reference to the power being switched off.

Do not award a mark for responses about RAM being fast, small/large in capacity or read-only, as these do not describe volatility.

Example answers and how they were marked
Full marks2/2

The data and instructions held in RAM are lost when the power is switched off (1) so RAM can only hold the data and instructions for programs that are currently running (1).

Why: Linked point (1): the contents are lost when the power is switched off, plus a distinct linked development (1): RAM only holds the data and instructions for programs that are currently running.

Some marks1/2

If the power is cut then the data and instructions in RAM are gone.

Why: Correct point (1): the data and instructions are lost when the power is cut; no distinct development is given, so only one mark.

No marks0/2

RAM is volatile, which means the data in it is stored permanently and cannot be changed.

Why: Reverses the meaning of volatile and says the contents are permanent; this is the misconception covered by the 'Do not accept' line, so no mark.

7Explain2 marksEmbedded Systems Swap Remove

A greenhouse uses an embedded system to keep the plants healthy.

Explain how the embedded system controls the temperature in the greenhouse.

[2 marks]
Mark scheme

Award up to two marks for a linked explanation such as:

  • A temperature sensor measures/reads the temperature in the greenhouse (1) which the processor compares with the value stored in the system (1)
  • The heater is switched on (1) when the temperature reading goes below the value stored in the system (1)
  • A fan/vent/window is opened/a cooler is switched on (1) when the temperature reading goes above the value stored in the system (1)
  • The temperature is checked/measured continuously (1) so the heater/fan is switched on or off as soon as the temperature changes (1)

For both marks, the expansion must follow/associate with the statement.

Allow one mark for a correct point on its own without a linked reason, e.g. 'a temperature sensor measures the temperature'.

Do not award 'the embedded system controls/keeps the temperature correct' as this repeats the question.

Do not accept naming a device without saying what it does, e.g. 'the greenhouse has a thermostat'.

Example answers and how they were marked
Full marks2/2

A temperature sensor measures the temperature in the greenhouse (1), which the processor compares with the value stored in the system (1).

Why: Point (1): the input and what it measures. Reason (1): the linked statement about what the processor does with the reading.

Some marks1/2

The embedded system uses a temperature sensor that measures the temperature in the greenhouse (1).

Why: A correct point on its own (1); no linked statement about what the system does with the reading, so the second mark is not awarded.

No marks0/2

The embedded system controls the temperature so the plants do not get too cold (0).

Why: Rewords the question without saying how the temperature is measured or changed, so no mark is awarded.

8Short recall3 marksFetch Decode Execute Cycle Swap Remove

The fetch-decode-execute cycle is used by the CPU.

State three things that happen during the fetch stage.

[3 marks]
Mark scheme

Award one mark for any of the following up to a maximum of three marks:

  • The address (of the next instruction) is sent from the CPU to main memory / placed on the address bus (1)
  • The (next) instruction is fetched/read from main memory (RAM) (1)
  • The instruction is brought/copied into the CPU / received into the MDR (1)
  • The program counter (PC) is incremented/updated to hold the address of the next instruction (1)

Allow 'the PC/MAR is placed on the address bus' for the address being sent to main memory.

Allow 'the MDR receives the instruction' for the instruction being brought into the CPU.

Do not award a second mark for the instruction being fetched from main memory and the instruction being brought into the CPU; these are the same point.

Do not award 'the instruction is transferred along the data bus' on its own; this is the same point as the instruction being fetched from main memory.

Do not accept answers about decoding the instruction, e.g. 'the instruction is fetched from RAM and decoded', as decoding happens in the decode stage.

Do not accept answers about the execute stage, e.g. 'the ALU carries out the calculation' or 'the result of a calculation is stored in a register', as these happen in the execute stage.

Example answers and how they were marked
Full marks3/3

The address of the next instruction is sent to main memory, the instruction is fetched from RAM, and the program counter is incremented.

Why: Address sent to main memory (1), instruction fetched from RAM (1) and program counter incremented (1).

Some marks1/3

The instruction is fetched from main memory and then decoded.

Why: Fetching the instruction from main memory (1); decoding happens in the decode stage, so it is not creditworthy in the fetch stage.

No marks0/3

The ALU carries out the calculation and the result is stored in a register.

Why: The ALU carrying out a calculation and storing a result happen in the execute stage, not the fetch stage, so no point is creditworthy.

9Short recall3 marksStored Program Computers Swap Remove

The CPU contains several components.

Name three components of the CPU.

[3 marks]
Mark scheme

Award one mark for any of the following up to a maximum of three marks:

  • Control unit / CU (1)
  • Arithmetic logic unit / ALU (1)
  • Register(s) (1)
  • Clock (1)

Do not accept main memory / RAM.

Do not accept cache.

Marks can be awarded in any order.

Example answers and how they were marked
Full marks3/3

Control unit, arithmetic logic unit and registers.

Why: Names three creditworthy CPU components (control unit, ALU, registers), one mark each.

Some marks2/3

Control unit, clock and main memory.

Why: Control unit (1) and clock (1) are creditworthy; main memory is not a component of the CPU, a common misconception seen in the June 2023 question.

No marks0/3

Main memory, RAM and cache.

Why: None are CPU components named in the specification; candidates often confuse main memory with CPU components.

10Discuss6 marksStored Program Computers Swap Remove

A college is buying new computers for its computer science classroom. A technician explains that the CPU uses three buses to communicate with main memory and other components.

Discuss the role of the address bus, the data bus and the control bus in the fetch-decode-execute cycle.

Your answer should include:

  • what each bus carries
  • the direction in which each bus carries it
  • the role of the buses in the fetch-decode-execute cycle.
[6 marks]
Mark scheme

Indicative content

What each bus carries

  • The address bus carries the address of a memory location that the CPU wants to read from or write to.
  • The data bus carries data and instructions between the CPU and main memory, and between the CPU and other components such as the input and output controllers.
  • The control bus carries control signals, such as read and write, that coordinate the activities of the computer.
  • The clock is a separate component that sends regular pulses, and the control bus carries the signals that keep the other components in time with those pulses.

Direction

  • The address bus is one-way, carrying addresses from the CPU to main memory.
  • The data bus is two-way, so data and instructions can travel both to and from the CPU.
  • The control bus carries control signals from the control unit to the other components, and it is not the clock signal itself.
  • The number of bits in the address bus determines how many memory locations can be addressed, and the number of bits in the data bus determines how much can be transferred at one time.

The role of the buses in the fetch-decode-execute cycle

  • Fetch: the address of the next instruction, held in a register in the CPU, is placed on the address bus so that main memory knows which location to read.
  • Fetch: the control unit sends a read signal on the control bus to main memory.
  • Fetch: the instruction held in that location is returned to the CPU on the data bus.
  • Decode: the control unit decodes the instruction and sends control signals on the control bus to set up the other components, for example telling the ALU which operation to carry out.
  • Execute: the address of any data needed is placed on the address bus, a read or write signal is sent on the control bus, and the data itself travels between the CPU and main memory on the data bus.
  • The cycle repeats, with each step taking place in time with a pulse from the clock.

Level 3 responses must cover all three buses and link them to the fetch-decode-execute cycle, including the fetch stage and at least one of the decode and execute stages. Answers that describe each bus correctly but link none of them to a stage of the cycle are limited to Level 1.

Do not accept 'the address bus carries data', 'the data bus carries addresses', 'the data bus carries instructions only during the fetch stage', 'the control bus carries the clock signal' or 'the control bus is the clock'; the clock is a separate component whose pulses the control signals coordinate with.

Levels

  • Level 0 (0 marks): No rewardable content.
  • Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
  • Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
  • Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)
Example answers and how they were marked
Full marks6/6

At the start of the fetch stage the address of the next instruction, which is held in a register, is placed on the address bus, which is one-way, so that main memory knows which location to read. The control unit sends a read signal on the control bus, and the instruction held at that address is returned to the CPU on the data bus, which is two-way. In the decode stage the control unit works out what the instruction means and sends control signals on the control bus to set up the other components, for example telling the ALU which operation to carry out. In the execute stage, if the instruction needs data from memory, the address of that data is placed on the address bus, a read or write signal is sent on the control bus and the data itself travels on the data bus. Every step happens on a pulse from the clock, which is a separate component, and the control bus carries the signals that keep the components in time with it. The widths of the buses matter too: more address bits mean more memory locations can be addressed and more data bits mean more can be moved at once.

Why: Level 3 (6 marks): all three buses are covered, with what each carries and its direction, and each is linked to the fetch, decode and execute stages, plus the role of the clock and the effect of bus widths.

Some marks2/6

The address bus carries addresses from the CPU to the memory and it is one-way. The data bus carries data and it is two-way. The control bus carries control signals. During the fetch stage the CPU fetches the instruction from memory using these buses.

Why: Level 1 (2 marks): each bus is named with a basic correct statement (address bus carries addresses one-way, data bus is two-way, control bus carries control signals), but no bus is linked to a stage of the cycle, so the guidance line limits this to Level 1; the general mention of the fetch stage is not tied to any bus.

No marks0/6

The address bus carries the data to the CPU. The data bus carries the addresses to the memory. The control bus is the clock that makes the CPU run faster.

Why: Level 0 (0 marks): the address bus and data bus roles are swapped, which the scheme says not to accept, and the control bus is wrongly described as the clock, which is also not accepted, so there is no rewardable content.

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