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Edexcel GCSE Computer Science (1CP2) Exam Questions

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5 questions · 18 marks

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1Describe2 marksStored Program Computers Swap Remove

A computer is based on the von Neumann stored program concept.

Describe how the CPU uses main memory (RAM) during the fetch-decode-execute cycle.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • The program's instructions (and the data it uses) are held in main memory/RAM (1) so the CPU fetches both the instructions and the data from that one memory (1)
  • The CPU fetches the next instruction from main memory/RAM (1) using the address of the memory location that holds it (1)
  • The CPU reads/fetches data from main memory/RAM (1) when an instruction needs it and writes the result back to main memory/RAM (1)
  • The program's instructions are held in main memory/RAM while the program runs (1) and the CPU fetches them one at a time/one after another to be decoded and executed (1)

Allow 'memory' for main memory/RAM.

Allow 'gets' for fetches/reads.

For both marks, the development must say what the CPU does with the contents of main memory (fetches/reads/writes), not just that main memory is used.

Do not accept answers about the program being stored in secondary storage, such as on a hard drive, or about it being loaded from there.

Do not accept benefits such as the computer running faster or being easier for the user.

Do not accept naming CPU components (control unit, arithmetic logic unit, registers) or buses on their own, without saying what is stored or fetched.

Do not accept 'the computer stores data' on its own, without a link to the instructions of a program.

Example answers and how they were marked
Full marks2/2

The program's instructions and the data it uses are both held in the same main memory (RAM) (1), so the CPU can fetch the instructions and the data it needs from that one memory (1).

Why: Linked point (1) that instructions and data are stored together in main memory, with the development (1) that the CPU fetches both from the same memory.

Some marks1/2

The CPU fetches the instructions from main memory (1) so that they are processed more quickly (1).

Why: The first point earns (1) for the CPU fetching instructions from main memory. The second statement is a benefit (speed), which the 'Do not accept benefits' line rules out, so it earns nothing.

No marks0/2

The control unit decodes each instruction (1) and the ALU carries out the calculations (1).

Why: Both statements name CPU components without saying what is stored, fetched or written, which the mark scheme tells examiners not to accept, so neither earns a mark.

2Describe2 marksSecondary Memory Swap Remove

A computer uses a magnetic hard disk.

Describe how data is stored on a magnetic hard disk.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • A read/write head moves over the surface of the disk (1) to read/write data by detecting or changing the magnetic alignment of areas of the surface (1)
  • The head magnetises areas of the disk surface in different directions (1) so each area represents a binary 1 or 0 (1)
  • Data is stored on concentric circles called tracks (1) which are divided into sectors (1)

Allow one mark for tracks/concentric circles on their own.

For the second mark in the first two bullets, the response must refer to the magnetic alignment/charge being detected or changed, not just that the head reads/writes data.

Do not award a mark for 'it is magnetic' or 'it stores data in binary' with no description of how the data is stored.

Do not accept descriptions of optical storage (e.g. a laser, pits and lands) or solid state storage (e.g. electric charges in chips).

Example answers and how they were marked
Full marks2/2

The read/write head moves over the magnetic surface and magnetises areas of the disk to store the 1s and 0s.

Why: Head moves over the surface (1) and magnetises areas to represent 1s and 0s (1).

Some marks1/2

The data is stored on tracks on the disk.

Why: Tracks/concentric circles (1), but no development such as tracks divided into sectors.

No marks0/2

It is magnetic and saves the data in 1s and 0s.

Why: Near-miss: 'magnetic' alone and 'data in binary/1s and 0s' with no description of how data is stored, which the mark scheme does not award.

3Explain2 marksEmbedded Systems Swap Remove

A greenhouse uses an embedded system to keep the plants healthy.

Explain how the embedded system controls the temperature in the greenhouse.

[2 marks]
Mark scheme

Award up to two marks for a linked explanation such as:

  • A temperature sensor measures/reads the temperature in the greenhouse (1) which the processor compares with the value stored in the system (1)
  • The heater is switched on (1) when the temperature reading goes below the value stored in the system (1)
  • A fan/vent/window is opened/a cooler is switched on (1) when the temperature reading goes above the value stored in the system (1)
  • The temperature is checked/measured continuously (1) so the heater/fan is switched on or off as soon as the temperature changes (1)

For both marks, the expansion must follow/associate with the statement.

Allow one mark for a correct point on its own without a linked reason, e.g. 'a temperature sensor measures the temperature'.

Do not award 'the embedded system controls/keeps the temperature correct' as this repeats the question.

Do not accept naming a device without saying what it does, e.g. 'the greenhouse has a thermostat'.

Example answers and how they were marked
Full marks2/2

A temperature sensor measures the temperature in the greenhouse (1), which the processor compares with the value stored in the system (1).

Why: Point (1): the input and what it measures. Reason (1): the linked statement about what the processor does with the reading.

Some marks1/2

The embedded system uses a temperature sensor that measures the temperature in the greenhouse (1).

Why: A correct point on its own (1); no linked statement about what the system does with the reading, so the second mark is not awarded.

No marks0/2

The embedded system controls the temperature so the plants do not get too cold (0).

Why: Rewords the question without saying how the temperature is measured or changed, so no mark is awarded.

4Discuss6 marksFetch Decode Execute Cycle Swap Remove

A school is upgrading the desktop computers in its computer science classroom. Each computer has a CPU, main memory and buses. The technician is explaining how the CPU uses these components during the fetch-decode-execute cycle.

Discuss how the CPU uses its components and the buses during the fetch-decode-execute cycle.

Your answer should consider:

  • the role of the CPU and registers
  • the role of the address bus, data bus and control bus
  • the role of the clock.
[6 marks]
Mark scheme

Indicative content

The role of the CPU and registers

  • The control unit decodes the instruction fetched from main memory and controls the other components during the cycle.
  • The ALU carries out arithmetic and logical operations during the execute stage, such as adding two values held in registers.
  • Registers hold the data, addresses and results that the CPU is working on during the cycle.
  • The program counter holds the address of the next instruction to be fetched, so it is incremented after each fetch.
  • The memory address register holds the address of the memory location that is about to be read or written.
  • The memory data register holds the instruction or data that has been fetched from or is being written to main memory.

The role of the address bus, data bus and control bus

  • The address bus carries the address of the memory location that the CPU needs to access from the CPU to main memory.
  • The address bus is one-way, so addresses are only sent from the CPU to main memory.
  • The data bus carries instructions and data between the CPU and main memory, so it is bi-directional.
  • The width of the data bus affects how many bits can be transferred at one time.
  • The control bus carries control signals such as read and write signals, so main memory knows whether the CPU wants to read an instruction or write data.
  • The control bus carries signals from the control unit to coordinate the components during the fetch-decode-execute cycle.

The role of the clock

  • The clock sends regular pulses that synchronise the actions of the CPU and main memory.
  • Each clock pulse triggers the next step of the fetch-decode-execute cycle, so the stages happen in the correct order.
  • The clock provides a regular timing signal so that the fetch-decode-execute cycle repeats at a steady rate.
  • The clock is separate from the control bus; the control bus carries control signals, while the clock provides timing pulses.
  • Do not credit the address bus storing addresses, the data bus storing data, or the control bus controlling the computer without naming a control signal; do not credit clock speed affecting performance as a role in the cycle.
  • Level 3 responses must cover all three bullets and link them to the fetch-decode-execute cycle; Level 2 answers may identify roles but link them only partly to the cycle.

Levels

  • Level 0 (0 marks): No rewardable content.
  • Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
  • Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
  • Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)
Example answers and how they were marked
Full marks6/6

The control unit decodes each instruction that is fetched from main memory and then controls the other components to execute it. The program counter holds the address of the next instruction, and this address is copied to the memory address register before it is sent along the address bus. The address bus carries this address from the CPU to main memory, and it is one-way. The data bus then carries the instruction back from main memory to the CPU; it is bi-directional, so it can also carry data to be written. The memory data register holds the instruction that has been fetched. The control bus carries read and write signals from the control unit, so memory knows whether the CPU wants to read an instruction or write data. During the execute stage, the ALU performs arithmetic or logical operations on data held in registers. The clock sends regular pulses that synchronise each stage, so one fetch, decode or execute step happens on each tick and the cycle repeats in the correct order.

Why: Comprehensive understanding of the CPU, registers, all three buses and the clock, with sustained application to the fetch-decode-execute cycle. Level 3.

Some marks4/6

The address bus carries the address of the next instruction from the program counter to main memory so it can be fetched. The data bus carries the instruction back to the CPU, and it is bi-directional. The control unit decodes the instruction. The clock sends pulses to keep the stages in order.

Why: Adequate understanding of some roles with some linkage to the fetch-decode-execute cycle, but the control bus, ALU and most registers are not covered. Level 2.

Some marks1/6

The data bus carries data between the CPU and RAM. The address bus stores the addresses that the CPU needs. The control bus controls the computer. The clock is the speed of the CPU.

Why: One basic, independent point (the data bus carries data) (1). The address bus does not store addresses, the control bus point names no control signal and clock speed is not a role in the cycle, so no further credit. Level 1.

5Discuss6 marksStored Program Computers Swap Remove

A college is replacing the computers in its IT suite. The technician tells the students that the new computers use the von Neumann stored program concept.

Discuss the von Neumann stored program concept and the role of the CPU and main memory (RAM) in the fetch-decode-execute cycle.

Your answer should consider:

  • the role of main memory (RAM)
  • the role of the CPU components (control unit, arithmetic logic unit, registers and clock)
  • the role of the address, data and control buses.

You do not need to consider how clock speed affects performance.

[6 marks]
Mark scheme

Indicative content

Stored program concept

  • The stored program concept means that the program instructions and the data the program is using are both held in the same main memory (RAM).
  • The CPU fetches an instruction from main memory, the control unit decodes it and the instruction is executed, and this is repeated in the fetch-decode-execute cycle.
  • The program is stored as a set of binary instructions, so a different program can be run on the college's new computers by loading different instructions into RAM rather than by changing any hardware.
  • Instructions are usually carried out one at a time, in the order in which they are stored, which is suitable for the computers in the IT suite that each run one piece of software at a time.

Main memory (RAM)

  • Main memory (RAM) holds the instructions and the data that the CPU is currently using.
  • RAM is directly accessible by the CPU, so the required instruction or item of data can be fetched quickly during the fetch stage of the cycle.
  • RAM can be read from and written to while a program is running, so the results produced by the students' work can be stored back into memory.
  • RAM is volatile, so its contents are lost when the power is turned off, and the college's computers will have empty RAM each time they are started.

CPU components

  • The control unit decodes each instruction and coordinates the timing and control of the other parts of the CPU, so it directs the fetch-decode-execute cycle.
  • The arithmetic logic unit (ALU) carries out arithmetic operations and logical comparisons on the data, for example working out a student's total mark in a spreadsheet.
  • Registers are small, fast storage locations inside the CPU that hold the address of the next instruction, the instruction being decoded and the data being worked on.
  • The clock sends a regular signal that synchronises the actions of the CPU, so each step of the cycle is carried out in time with the clock.

Buses

  • The address bus is one way, from the CPU to main memory, and carries the address of the memory location that the CPU wants to read from or write to.
  • The data bus carries the instruction or the data between the CPU and main memory, so it is used to bring an instruction to the CPU in the fetch stage.
  • The control bus carries control signals such as read and write, so the CPU can tell main memory whether it is reading an instruction or writing data.

Levels

  • Level 0 (0 marks): No rewardable content.
  • Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
  • Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
  • Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)

Additional guidance

  • Level 3 responses must cover the role of main memory (RAM) and the role of the CPU components or the buses during the fetch-decode-execute cycle, as well as the stored program concept.
  • Do not accept RAM described as being inside the CPU, or as non-volatile, or any point about how clock speed affects performance, because the question excludes it.
Example answers and how they were marked
Full marks6/6

The von Neumann stored program concept means that the program instructions and the data the program is using are both held in the same main memory (RAM). This means each of the college's new computers can run any piece of software simply by loading a different set of instructions into its RAM, with no change to the hardware. The CPU fetches an instruction from RAM, the control unit decodes it and the instruction is executed, and this repeats in the fetch-decode-execute cycle. RAM holds the instructions and data that the CPU is currently using and is directly accessible by the CPU, so they can be fetched quickly, but it is volatile, so the contents are lost when a computer is switched off at the end of the day. During the fetch stage, the address bus carries the address of the instruction in RAM, the data bus carries the instruction back to the CPU, and the control bus carries the control signals, such as read, that tell main memory what to do. Registers inside the CPU hold the address of the next instruction and the data being worked on, the clock sends a regular signal so that every step of the cycle happens in time, and the ALU carries out the arithmetic and logical operations needed by the students' work in the IT suite.

Why: Level 3: accurate stored program concept linked to loading software on the college's computers, the role of RAM including volatility, and the roles of the address, data and control buses, registers, clock and ALU, all applied to the situation.

Some marks3/6

The stored program concept means that the program instructions and the data the program is using are stored together in the same memory. The CPU fetches an instruction from main memory, decodes it and then executes it. Main memory (RAM) holds the instructions and data that the CPU is using and it can be read from and written to, so the CPU can get at them quickly. RAM is volatile, so its contents are lost when the computer is switched off.

Why: Level 2: an adequate account of the stored program concept and the role of RAM, with one line of reasoning (fetch, decode, execute) and the volatility point, but no coverage of the CPU components or the buses and no application to the college's computers, so it stays at the lower end of Level 2.

Some marks1/6

In von Neumann architecture the CPU fetches and decodes instructions one at a time. RAM is the memory inside the CPU that stores the program so that it is not lost when the computer is switched off. The clock speed makes the CPU faster so the fetch-decode-execute cycle runs more quickly.

Why: Level 1: one basic point about the CPU fetching and decoding instructions from memory; RAM is wrongly placed inside the CPU and described as non-volatile and the clock speed point is excluded by the question, so neither is credited.

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