Edexcel GCSE Computer Science (1CP2) Exam Questions

• A Address bus (1)
• The only correct answer is A. The correct answer is address bus. Do not accept 'address' on its own.
• B is not correct because the control bus carries control signals in both directions between the CPU and other components
• C is not correct because the data bus carries data in both directions between the CPU and main memory
• D is not correct because the system bus is the collection of all three buses

Award one mark for:

• Volatile (1)

Allow volatile memory / it is volatile.

Do not accept non-volatile, ROM, RAM or temporary/short term memory on their own, as these are not the term asked for.

Award up to two marks for a linked description such as:

• It is a computer/processor built into a larger device (1) to carry out a single dedicated task/function (1)
• It is a combination of a processor, memory and input/output in one unit (1) that controls the device it is part of (1)
• It is a computer that forms part of another device (1) so it is not used as a general purpose computer (1)

Allow 'forms part of another device' or 'inside another device' for the first mark.

Do not award the second mark for a separate fact that is not linked to the first point, e.g. 'It is built into a device and it uses little power' would earn only the first mark (1).

Do not accept 'a small computer' on its own, with no reference to being part of another device or performing a dedicated task.

Do not accept 'a computer that controls a device' on its own, with no reference to it being built into/part of a larger device or carrying out a dedicated task.

Do not accept 'it performs a single dedicated task' on its own, with no reference to it being built into/part of a larger device.

Do not accept descriptions of a general purpose computer, e.g. 'it can run many different programs' or 'new software can be installed'.

Do not accept 'it is a system that is embedded in another system' as this repeats the term in the question.

Award up to two marks for a linked description such as:

• Decodes each (fetched) instruction (1) to work out which operation is needed / which components should carry it out (1)
• Coordinates/directs the other components (1) by sending control signals along the control bus (1)
• Fetches the next instruction (1) by sending its address to main memory along the address bus (1)
• Sends a read/write control signal to main memory (1) so that the instruction or data is transferred during the fetch/execute stage (1)

Do not accept answers about synchronising the CPU or timing the cycles (that is the role of the clock).

Do not accept answers about carrying out arithmetic or logical operations (that is the ALU).

Do not accept answers about holding data or the results of instructions (that is registers/main memory).

Do not accept generic answers that only say the CU controls the CPU or processes instructions, with no linked development.

Only award one mark for a response that only repeats that the CU sends control signals; the second mark needs a linked outcome such as coordination, a memory read/write, or fetching an instruction.

Do not accept 'during the decode stage' as the development for the decoding point, as it restates the question.

Indicative content

Stored program concept

• The stored program concept means that the program instructions and the data the program is using are both held in the same main memory (RAM).
• The CPU fetches an instruction from main memory, the control unit decodes it and the instruction is executed, and this is repeated in the fetch-decode-execute cycle.
• The program is stored as a set of binary instructions, so a different program can be run on the college's new computers by loading different instructions into RAM rather than by changing any hardware.
• Instructions are usually carried out one at a time, in the order in which they are stored, which is suitable for the computers in the IT suite that each run one piece of software at a time.

Main memory (RAM)

• Main memory (RAM) holds the instructions and the data that the CPU is currently using.
• RAM is directly accessible by the CPU, so the required instruction or item of data can be fetched quickly during the fetch stage of the cycle.
• RAM can be read from and written to while a program is running, so the results produced by the students' work can be stored back into memory.
• RAM is volatile, so its contents are lost when the power is turned off, and the college's computers will have empty RAM each time they are started.

CPU components

• The control unit decodes each instruction and coordinates the timing and control of the other parts of the CPU, so it directs the fetch-decode-execute cycle.
• The arithmetic logic unit (ALU) carries out arithmetic operations and logical comparisons on the data, for example working out a student's total mark in a spreadsheet.
• Registers are small, fast storage locations inside the CPU that hold the address of the next instruction, the instruction being decoded and the data being worked on.
• The clock sends a regular signal that synchronises the actions of the CPU, so each step of the cycle is carried out in time with the clock.

Buses

• The address bus is one way, from the CPU to main memory, and carries the address of the memory location that the CPU wants to read from or write to.
• The data bus carries the instruction or the data between the CPU and main memory, so it is used to bring an instruction to the CPU in the fetch stage.
• The control bus carries control signals such as read and write, so the CPU can tell main memory whether it is reading an instruction or writing data.

Levels

• Level 0 (0 marks): No rewardable content.
• Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
• Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
• Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)

Additional guidance

• Level 3 responses must cover the role of main memory (RAM) and the role of the CPU components or the buses during the fetch-decode-execute cycle, as well as the stored program concept.
• Do not accept RAM described as being inside the CPU, or as non-volatile, or any point about how clock speed affects performance, because the question excludes it.