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Edexcel GCSE Computer Science (1CP2) Exam Questions

Build a practice paper from 693 exam-style questions, each with its mark scheme and example answers. Print it, or answer it on paper and then open the mark schemes. Or browse the questions by topic.

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3 questions · 7 marks

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1Short recall3 marksStored Program Computers Swap Remove

The CPU contains several components.

Name three components of the CPU.

[3 marks]
Mark scheme

Award one mark for any of the following up to a maximum of three marks:

  • Control unit / CU (1)
  • Arithmetic logic unit / ALU (1)
  • Register(s) (1)
  • Clock (1)

Do not accept main memory / RAM.

Do not accept cache.

Marks can be awarded in any order.

Example answers and how they were marked
Full marks3/3

Control unit, arithmetic logic unit and registers.

Why: Names three creditworthy CPU components (control unit, ALU, registers), one mark each.

Some marks2/3

Control unit, clock and main memory.

Why: Control unit (1) and clock (1) are creditworthy; main memory is not a component of the CPU, a common misconception seen in the June 2023 question.

No marks0/3

Main memory, RAM and cache.

Why: None are CPU components named in the specification; candidates often confuse main memory with CPU components.

2Short recall2 marksStored Program Computers Swap Remove

The central processing unit (CPU) contains an arithmetic logic unit (ALU).

State two types of operation carried out by the ALU.

[2 marks]
Mark scheme

Award one mark for any of the following up to a maximum of two marks:

  • An arithmetic operation, e.g. addition/subtraction/multiplication/division (1)
  • A logical operation, e.g. comparing two values (is A > B?) / using AND, OR, NOT (1)

Do not accept decoding instructions, fetching instructions or controlling the timing of the CPU, as these are carried out by the control unit.

Example answers and how they were marked
Full marks2/2

It carries out arithmetic operations such as addition and subtraction, and logical operations such as comparing two values to see if one is greater than the other.

Why: Arithmetic operation (1) and logical operation (1).

Some marks1/2

It adds numbers together and works out the result.

Why: Arithmetic operation, addition (1). No logical operation.

No marks0/2

It decodes the instructions that have been fetched from main memory.

Why: Decoding and fetching are the control unit's role; the mark scheme's do-not-accept line covers this.

3Describe2 marksFetch Decode Execute Cycle Swap Remove

The CPU contains registers.

Describe the role of registers in the fetch-decode-execute cycle.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • During fetch, the program counter holds the address of the next instruction (1) which is used to fetch that instruction from main memory/RAM (1)
  • During fetch, the instruction is held in a register/current instruction register (1) so the control unit can decode it (1)
  • During decode, the control unit decodes the instruction held in a register/current instruction register (1) to identify the operation/operand to be carried out (1)
  • During execute, a register/accumulator holds the data being operated on (1) and stores the result from the ALU (1)
  • During execute, a register holds the result of an ALU operation (1) before it is written back to main memory/RAM (1)

Accept other correctly named registers (program counter/PC, current instruction register/CIR, memory address register/MAR, memory data register/MDR, accumulator) where their role is linked to a stage of the fetch-decode-execute cycle.

Do not accept 'registers store data' or 'registers hold data' on its own, without a link to fetch, decode or execute (or to the CPU currently processing it).

Do not accept responses that state registers are in main memory or that registers store data/instructions permanently.

Do not accept 'registers are a type of memory' or 'registers store the program' as they do not describe a role in the fetch-decode-execute cycle.

Example answers and how they were marked
Full marks2/2

During fetch, the program counter holds the address of the next instruction, which is used to fetch that instruction from main memory.

Why: Linked point (1) and development (1): program counter holds the address of the next instruction during fetch, and this is used to fetch it from main memory.

Some marks1/2

During fetch, the program counter holds the address of the next instruction.

Why: Point only (1): names a register and gives a role in the fetch stage, but no linked development.

No marks0/2

Registers are part of main memory and store the program permanently.

Why: No creditworthy point: states registers are in main memory and store data permanently, which the mark scheme rejects.

Questions by topic

2.1 Binary

Build a paper on this topic 58
Adding Binary Numbers 6 questions Binary and Hexadecimal Basics 10 questions Binary Shifts 6 questions Binary to Denary Conversion 6 questions Binary to Hexadecimal Conversion 6 questions Denary to Binary Conversion 6 questions Denary to Hexadecimal Conversion 6 questions Denary to Negative Binary Conversion 6 questions Hexadecimal to Binary Conversion 6 questions

2.2 Data representation

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Character Sets 18 questions Images 19 questions Sound 19 questions

2.3 Data storage and compression

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Compression 18 questions Units & Conversion 6 questions

3.1 Hardware

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Embedded Systems 17 questions Fetch Decode Execute Cycle 15 questions Primary Memory 15 questions Secondary Memory 15 questions Stored Program Computers 15 questions

3.2 Software

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File Management 18 questions Memory Management 16 questions Peripheral Management 11 questions Process Management 12 questions Purpose & Function of Operating Systems 17 questions Software Basics 13 questions User Management 18 questions Utility Software 19 questions

3.3 Programming languages

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Low and High Level Languages 19 questions Translators 18 questions

4.1 Networks

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Addressing 16 questions LANs & WANs 16 questions Network Speed 5 questions Packet Switching 16 questions Protocols & Layers 17 questions The Internet 16 questions Topologies 17 questions Wired Connections 17 questions Wireless Connections 18 questions

4.2 Network security

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Network Security Risks 18 questions Preventing Network Security Risks 18 questions

5.1 Environmental

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E-waste 17 questions Manufacturing Technology 19 questions

5.2 Ethical and legal

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Data Protection Act 17 questions Impact of AI 18 questions Intellectual Property 18 questions Software Licences 18 questions

5.3 Cybersecurity

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Malware 18 questions Social Engineering 18 questions

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