Edexcel GCSE Computer Science (1CP2) Exam Questions

Award one mark for any of the following up to a maximum of two marks:

• An arithmetic operation, e.g. addition/subtraction/multiplication/division (1)
• A logical operation, e.g. comparing two values (is A > B?) / using AND, OR, NOT (1)

Do not accept decoding instructions, fetching instructions or controlling the timing of the CPU, as these are carried out by the control unit.

Award up to two marks for a linked description such as:

• A read/write head moves over the surface of the disk (1) to read/write data by detecting or changing the magnetic alignment of areas of the surface (1)
• The head magnetises areas of the disk surface in different directions (1) so each area represents a binary 1 or 0 (1)
• Data is stored on concentric circles called tracks (1) which are divided into sectors (1)

Allow one mark for tracks/concentric circles on their own.

For the second mark in the first two bullets, the response must refer to the magnetic alignment/charge being detected or changed, not just that the head reads/writes data.

Do not award a mark for 'it is magnetic' or 'it stores data in binary' with no description of how the data is stored.

Do not accept descriptions of optical storage (e.g. a laser, pits and lands) or solid state storage (e.g. electric charges in chips).

Indicative content

Fetching and decoding an instruction

• The register that holds the address of the next instruction (the program counter) contains the address of the instruction to be fetched.
• This address is sent to main memory (RAM) and the instruction is copied from main memory into a register inside the CPU.
• The program counter is updated so that it holds the address of the next instruction in the program.
• The control unit decodes the instruction that has been fetched, working out which operation is required and which data or registers are needed.
• The control unit sends control signals to coordinate the other components as the instruction is carried out.
• The control unit decides what happens next, for example after a comparison it decides whether the next instruction is the following one or a jump.

The arithmetic logic unit (ALU) executes an instruction

• The control unit directs the arithmetic logic unit (ALU) to carry out the operation.
• The ALU performs arithmetic operations such as addition, subtraction, multiplication and division, for example adding two values in a program written by the class.
• The ALU performs logical operations such as comparing two values to see if they are equal or whether one is greater than the other.
• The result of the operation carried out by the ALU is passed back and stored in a register.
• The ALU operates on data that has been fetched from main memory; it does not fetch the instruction and it does not decide which instruction is next.

Registers

• Registers are small, very fast memory locations inside the CPU.
• They hold the data, addresses and results that the CPU is working on during the cycle.
• Registers are used in every stage of the cycle, not only when the ALU produces a result.
• Because registers are inside the CPU they can be read and written much faster than main memory during the cycle.

Levels

• Level 0 (0 marks): No rewardable content.
• Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
• Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
• Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)
• A Level 3 answer must link the roles of all three components to the fetch, decode and execute stages. An answer that links only one component to a stage, with the other points listed separately, is Level 1 (1–2 marks); an answer that links two of the components to stages is Level 2 (3–4 marks). A point repeated under more than one heading is credited once only.
• Accept 'the program counter', 'the address register' or 'a register holding the address of the next instruction' as the register that holds the address of the next instruction. Do not accept 'the control unit performs the calculations', 'the ALU controls the timing of the CPU' / 'the ALU sends the clock signal' or 'registers are in main memory (RAM)'.

Indicative content

Stored program concept

• The stored program concept means that the program instructions and the data the program is using are both held in the same main memory (RAM).
• The CPU fetches an instruction from main memory, the control unit decodes it and the instruction is executed, and this is repeated in the fetch-decode-execute cycle.
• The program is stored as a set of binary instructions, so a different program can be run on the college's new computers by loading different instructions into RAM rather than by changing any hardware.
• Instructions are usually carried out one at a time, in the order in which they are stored, which is suitable for the computers in the IT suite that each run one piece of software at a time.

Main memory (RAM)

• Main memory (RAM) holds the instructions and the data that the CPU is currently using.
• RAM is directly accessible by the CPU, so the required instruction or item of data can be fetched quickly during the fetch stage of the cycle.
• RAM can be read from and written to while a program is running, so the results produced by the students' work can be stored back into memory.
• RAM is volatile, so its contents are lost when the power is turned off, and the college's computers will have empty RAM each time they are started.

CPU components

• The control unit decodes each instruction and coordinates the timing and control of the other parts of the CPU, so it directs the fetch-decode-execute cycle.
• The arithmetic logic unit (ALU) carries out arithmetic operations and logical comparisons on the data, for example working out a student's total mark in a spreadsheet.
• Registers are small, fast storage locations inside the CPU that hold the address of the next instruction, the instruction being decoded and the data being worked on.
• The clock sends a regular signal that synchronises the actions of the CPU, so each step of the cycle is carried out in time with the clock.

Buses

• The address bus is one way, from the CPU to main memory, and carries the address of the memory location that the CPU wants to read from or write to.
• The data bus carries the instruction or the data between the CPU and main memory, so it is used to bring an instruction to the CPU in the fetch stage.
• The control bus carries control signals such as read and write, so the CPU can tell main memory whether it is reading an instruction or writing data.

Levels

• Level 0 (0 marks): No rewardable content.
• Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
• Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
• Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)

Additional guidance

• Level 3 responses must cover the role of main memory (RAM) and the role of the CPU components or the buses during the fetch-decode-execute cycle, as well as the stored program concept.
• Do not accept RAM described as being inside the CPU, or as non-volatile, or any point about how clock speed affects performance, because the question excludes it.