Edexcel GCSE Computer Science (1CP2) Exam Questions

• A Blu-ray Disc (1)
• The only correct answer is A. The correct answer is Blu-ray Disc.
• B is not correct because a CD stores less data than a Blu-ray Disc, up to about 700 MB
• C is not correct because a DVD stores less data than a Blu-ray Disc, up to about 4.7 GB (single-layer) or 8.4 GB (dual-layer)
• D is not correct because magnetic tape is not an optical storage medium

Award one mark for any of the following up to a maximum of two marks:

• The program instructions and data are stored together in main memory/RAM (1)
• The same memory is used for both instructions and data (1)
• The instructions are fetched from main memory and executed by the CPU (1)
• The instructions are fetched and executed one at a time / in sequence (1)
• The program can be changed/replaced by loading new instructions into memory, without changing the hardware (1)

Do not accept the program is stored in secondary storage / on the hard disk.

Do not accept the program is stored in the CPU / in registers.

Award one mark for any of the following up to a maximum of two marks:

• Program instructions are stored in main memory/RAM (1)
• The data used by the program is stored in main memory/RAM (1)
• The CPU fetches/reads instructions from main memory to execute them (1)
• The program can be run without the instructions being input again (1)

Allow 'the program is stored in memory' for one mark.

Do not accept answers about programs being stored on secondary storage, such as a hard disk or USB memory stick.

Do not accept answers that only describe the von Neumann architecture (e.g. having a CPU and memory) without stating that instructions are stored in main memory.

Award up to two marks for a linked explanation such as:

• Decodes/interprets/translates the instruction (1) to work out what the instruction is/what operation is required (1)
• Sends control signals to the other components (1) so that the correct component carries out the instruction (1), e.g. the ALU/main memory
• Controls the fetch of the instruction from main memory (1) because the address of the next instruction is sent via the address bus (1)
• Controls the fetch of the next instruction from main memory (1) by sending a control signal/read signal to main memory (1)

For both marks, the expansion must follow/associate with the statement.

For the decode point, 'decodes the instruction' alone gains 1 mark; a second mark needs the purpose of decoding, i.e. working out what the instruction is/what operation is required.

Do not accept 'it controls the CPU' on its own, without naming a task in the cycle.

Do not accept 'it fetches the instruction from memory' on its own, as this describes the fetch step rather than the control unit's role; credit only if linked to controlling/signalling the fetch.

Do not accept carrying out arithmetic/logical operations, as these are carried out by the ALU, or holding the address of the next instruction, as this is the program counter.

Do not accept storing the instruction in a register (e.g. MAR/MDR), as this is not the role of the control unit.

Indicative content

Control unit and ALU

• The control unit fetches and decodes each instruction that the new computers are running, so it works out which operation has to be carried out.
• The control unit sends control signals to the ALU and to main memory over the control bus so that the other components carry out the instruction.
• The control unit receives the clock signal, so each stage of the cycle begins on a clock tick.
• The ALU carries out arithmetic operations, such as adding two values, and logical operations, such as comparing two values, during the execute stage.
• The ALU is the component that performs the calculations that a program running on the new computers needs.
• The data the ALU works on is held in registers, and the result of the operation is stored in a register such as the accumulator.

Registers

• Registers are small, very fast memory locations inside the CPU that hold the instructions and data the CPU is working on.
• The program counter holds the address of the next instruction to be fetched, and it is incremented each time an instruction is fetched.
• The memory address register (MAR) holds the address of the main memory location that is to be read from or written to during the fetch stage.
• The memory data register (MDR) holds the instruction or data brought from main memory (RAM) over the data bus before it is decoded.
• The accumulator holds the result of an operation carried out by the ALU.
• Because registers are inside the CPU, the CPU can keep working on a value without going back to slower main memory during the cycle.

Working together as the cycle repeats

• In the fetch stage, the address of the next instruction is copied from the program counter into the memory address register and sent to main memory over the address bus, and the instruction comes back over the data bus into the memory data register.
• In the decode stage the control unit interprets the instruction and works out which components are needed for it.
• In the execute stage the control unit signals the ALU or main memory so that the instruction is carried out, and the result is held in a register.
• The clock sends a regular pulse so that the fetch, decode and execute stages of each instruction happen in step.
• The program counter is then incremented, so the cycle repeats with the address of the next instruction to be fetched.

Levels

• Level 0 (0 marks): No rewardable content.
• Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
• Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
• Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)

Additional guidance

• A list of correct but independent roles, with no linkage between the components and no reference to the stages of the cycle, is limited to Level 1; an answer that gives the roles of the components but does not link them to the fetch, decode and execute stages is limited to Level 2; a Level 3 answer must cover the control unit/ALU and registers and link them to the stages of the cycle.
• Award no credit for 'the control unit is the brain of the CPU', 'the ALU stores data' or 'registers are the same as RAM'; accept the program counter, MAR, MDR and accumulator as examples of registers, accept the clock, address bus, data bus and control bus where they are linked to a stage of the cycle, and accept 'main memory' or 'RAM' as equivalent.