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Edexcel GCSE Computer Science (1CP2) Exam Questions

Build a practice paper from 693 exam-style questions, each with its mark scheme and example answers. Print it, or answer it on paper and then open the mark schemes. Or browse the questions by topic.

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4 questions · 11 marks

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1Multiple choice1 markSecondary Memory Swap Remove

A company stores films on optical media.

Identify the optical storage medium that can store the most data.

[1 mark]
  • ABlu-ray Disc
  • BCD
  • CDVD
  • DMagnetic tape
Mark scheme
  • A Blu-ray Disc (1)
  • The only correct answer is A. The correct answer is Blu-ray Disc.
  • B is not correct because a CD stores less data than a Blu-ray Disc, up to about 700 MB
  • C is not correct because a DVD stores less data than a Blu-ray Disc, up to about 4.7 GB (single-layer) or 8.4 GB (dual-layer)
  • D is not correct because magnetic tape is not an optical storage medium
Example answers and how they were marked
Full marks1/1

A Blu-ray Disc

Why: Correct option (1): a Blu-ray Disc has the greatest capacity of the optical media.

No marks0/1

C DVD

Why: Near miss scoring 0: a DVD is optical but stores less than a Blu-ray Disc (mark scheme line C). Only A is credited.

No marks0/1

D Magnetic tape

Why: Misconception scoring 0: candidates pick tape for its large capacity but magnetic tape is not an optical storage medium (mark scheme line D).

2Describe2 marksEmbedded Systems Swap Remove

Many modern devices contain embedded systems.

Describe what is meant by the term embedded system.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • It is a computer/processor built into a larger device (1) to carry out a single dedicated task/function (1)
  • It is a combination of a processor, memory and input/output in one unit (1) that controls the device it is part of (1)
  • It is a computer that forms part of another device (1) so it is not used as a general purpose computer (1)

Allow 'forms part of another device' or 'inside another device' for the first mark.

Do not award the second mark for a separate fact that is not linked to the first point, e.g. 'It is built into a device and it uses little power' would earn only the first mark (1).

Do not accept 'a small computer' on its own, with no reference to being part of another device or performing a dedicated task.

Do not accept 'a computer that controls a device' on its own, with no reference to it being built into/part of a larger device or carrying out a dedicated task.

Do not accept 'it performs a single dedicated task' on its own, with no reference to it being built into/part of a larger device.

Do not accept descriptions of a general purpose computer, e.g. 'it can run many different programs' or 'new software can be installed'.

Do not accept 'it is a system that is embedded in another system' as this repeats the term in the question.

Example answers and how they were marked
Full marks2/2

An embedded system is a computer built into a larger device to carry out one specific/dedicated task

Why: Linked point (1) that it is built into a larger device, developed (1) with the dedicated task it performs.

Some marks1/2

It is a small computer that is inside another device.

Why: First point only (1) - inside/part of another device - with no linked development of a dedicated task.

No marks0/2

It is a computer that controls a device.

Why: Near-miss: only says it controls a device, with no reference to being built into/part of a larger device or a dedicated task, so no marks.

3Describe2 marksEmbedded Systems Swap Remove

A drone is controlled by an embedded system.

Describe the purpose of the embedded system in the drone.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • It controls the motors/rotors (1) so that the drone can take off, hover, turn and land (1)
  • It keeps the drone stable/level automatically (1) by taking readings from a sensor (accelerometer/gyroscope/GPS) (1)
  • It receives signals from the remote control (1) and changes the speed of the motors to steer the drone (1)
  • It monitors the battery level (1) and brings the drone back to the ground before the battery runs out (1)

The development must relate to the function given in the point.

Accept a named function that the embedded system controls, e.g. 'it keeps the drone level', as the first mark (1).

Award the second mark only when the development gives a specific outcome or detail of that function, e.g. 'so that the drone can take off, hover, turn and land' or 'by changing the motor speeds to keep it level'.

Do not award the second mark for a generic outcome such as 'so it works', 'so it can fly' or 'so the drone moves'.

A bare 'it controls the motors so it can fly' therefore earns the first mark only.

Allow any other specific function of a drone that is carried out by the embedded system.

Do not accept 'it flies the drone' / 'it is the drone's brain' / 'it makes the drone work' without a named function being controlled.

Do not accept answers that describe the user or the remote control flying the drone with no function carried out by the embedded system.

Example answers and how they were marked
Full marks2/2

It keeps the drone level while it is in the air by reading the accelerometer and changing the speed of the motors.

Why: Named function of the embedded system, keeping the drone level (1), developed with the sensor reading and motor speed changes that achieve it (1).

Some marks1/2

It controls the motors of the drone.

Why: First mark only (1) for naming a function the embedded system controls, with no linked outcome or detail to earn the second mark.

No marks0/2

It is the brain of the drone and makes the drone work.

Why: Vague phrase with no named function being controlled, which the mark scheme's 'Do not accept' line rules out.

4Discuss6 marksFetch Decode Execute Cycle Swap Remove

A school is upgrading the desktop computers in its computer science classroom. Each computer has a CPU, main memory and buses. The technician is explaining how the CPU uses these components during the fetch-decode-execute cycle.

Discuss how the CPU uses its components and the buses during the fetch-decode-execute cycle.

Your answer should consider:

  • the role of the CPU and registers
  • the role of the address bus, data bus and control bus
  • the role of the clock.
[6 marks]
Mark scheme

Indicative content

The role of the CPU and registers

  • The control unit decodes the instruction fetched from main memory and controls the other components during the cycle.
  • The ALU carries out arithmetic and logical operations during the execute stage, such as adding two values held in registers.
  • Registers hold the data, addresses and results that the CPU is working on during the cycle.
  • The program counter holds the address of the next instruction to be fetched, so it is incremented after each fetch.
  • The memory address register holds the address of the memory location that is about to be read or written.
  • The memory data register holds the instruction or data that has been fetched from or is being written to main memory.

The role of the address bus, data bus and control bus

  • The address bus carries the address of the memory location that the CPU needs to access from the CPU to main memory.
  • The address bus is one-way, so addresses are only sent from the CPU to main memory.
  • The data bus carries instructions and data between the CPU and main memory, so it is bi-directional.
  • The width of the data bus affects how many bits can be transferred at one time.
  • The control bus carries control signals such as read and write signals, so main memory knows whether the CPU wants to read an instruction or write data.
  • The control bus carries signals from the control unit to coordinate the components during the fetch-decode-execute cycle.

The role of the clock

  • The clock sends regular pulses that synchronise the actions of the CPU and main memory.
  • Each clock pulse triggers the next step of the fetch-decode-execute cycle, so the stages happen in the correct order.
  • The clock provides a regular timing signal so that the fetch-decode-execute cycle repeats at a steady rate.
  • The clock is separate from the control bus; the control bus carries control signals, while the clock provides timing pulses.
  • Do not credit the address bus storing addresses, the data bus storing data, or the control bus controlling the computer without naming a control signal; do not credit clock speed affecting performance as a role in the cycle.
  • Level 3 responses must cover all three bullets and link them to the fetch-decode-execute cycle; Level 2 answers may identify roles but link them only partly to the cycle.

Levels

  • Level 0 (0 marks): No rewardable content.
  • Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
  • Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
  • Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)
Example answers and how they were marked
Full marks6/6

The control unit decodes each instruction that is fetched from main memory and then controls the other components to execute it. The program counter holds the address of the next instruction, and this address is copied to the memory address register before it is sent along the address bus. The address bus carries this address from the CPU to main memory, and it is one-way. The data bus then carries the instruction back from main memory to the CPU; it is bi-directional, so it can also carry data to be written. The memory data register holds the instruction that has been fetched. The control bus carries read and write signals from the control unit, so memory knows whether the CPU wants to read an instruction or write data. During the execute stage, the ALU performs arithmetic or logical operations on data held in registers. The clock sends regular pulses that synchronise each stage, so one fetch, decode or execute step happens on each tick and the cycle repeats in the correct order.

Why: Comprehensive understanding of the CPU, registers, all three buses and the clock, with sustained application to the fetch-decode-execute cycle. Level 3.

Some marks4/6

The address bus carries the address of the next instruction from the program counter to main memory so it can be fetched. The data bus carries the instruction back to the CPU, and it is bi-directional. The control unit decodes the instruction. The clock sends pulses to keep the stages in order.

Why: Adequate understanding of some roles with some linkage to the fetch-decode-execute cycle, but the control bus, ALU and most registers are not covered. Level 2.

Some marks1/6

The data bus carries data between the CPU and RAM. The address bus stores the addresses that the CPU needs. The control bus controls the computer. The clock is the speed of the CPU.

Why: One basic, independent point (the data bus carries data) (1). The address bus does not store addresses, the control bus point names no control signal and clock speed is not a role in the cycle, so no further credit. Level 1.

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