Edexcel GCSE Computer Science (1CP2) Exam Questions

• A To store data and programs permanently (1)
• The only correct answer is A. The correct answer is to store data and programs permanently.
• B is not correct because storing the data and instructions currently in use is the role of primary storage/RAM, which is volatile, not the role of secondary storage
• C is not correct because calculations on data are carried out by the CPU, not by secondary storage
• D is not correct because secondary storage is not directly accessible by the CPU; data must first be copied into RAM

• A Address bus (1)
• The only correct answer is A. The correct answer is address bus. Do not accept 'address' on its own.
• B is not correct because the control bus carries control signals in both directions between the CPU and other components
• C is not correct because the data bus carries data in both directions between the CPU and main memory
• D is not correct because the system bus is the collection of all three buses

Award up to two marks for a linked explanation such as:

• The battery lasts longer/needs charging less often (1) because embedded systems have low power consumption/use less power (1)
• It can be made small/light enough to wear on the wrist (1) because the processor, memory and input/output are combined on a single chip/microcontroller (1)
• It can carry out the step-counting function reliably (1) because it runs a single/dedicated program and cannot install other software (1)
• It has a low cost per unit (1) because it uses fewer/less powerful components than a general purpose computer (1)

For both marks, the expansion must follow/associate with the statement.

Award one mark for a valid point stated on its own, e.g. 'it is small/light enough to wear on the wrist' (1) or 'its battery lasts longer before it needs charging' (1).

Accept the same linked ideas in either order, e.g. 'it uses less power (1) so the battery lasts longer (1)'.

Do not accept 'it uses less power'/'low power' on its own as a complete explanation; it must be linked to the battery lasting longer/needing charging less often for the second mark.

Do not accept an expansion that simply restates the point, e.g. 'it is small (1) so it fits on the wrist' earns only the point mark; 'fits on the wrist' is not a linked cause and is not enough for the second mark.

Do not accept 'the battery is small' as the linked reason for low power consumption.

Do not accept responses that say other software/apps can be installed on an embedded system (0); embedded systems have a single/dedicated function and cannot install new software.

Indicative content

Control unit and ALU

• The control unit fetches and decodes each instruction that the new computers are running, so it works out which operation has to be carried out.
• The control unit sends control signals to the ALU and to main memory over the control bus so that the other components carry out the instruction.
• The control unit receives the clock signal, so each stage of the cycle begins on a clock tick.
• The ALU carries out arithmetic operations, such as adding two values, and logical operations, such as comparing two values, during the execute stage.
• The ALU is the component that performs the calculations that a program running on the new computers needs.
• The data the ALU works on is held in registers, and the result of the operation is stored in a register such as the accumulator.

Registers

• Registers are small, very fast memory locations inside the CPU that hold the instructions and data the CPU is working on.
• The program counter holds the address of the next instruction to be fetched, and it is incremented each time an instruction is fetched.
• The memory address register (MAR) holds the address of the main memory location that is to be read from or written to during the fetch stage.
• The memory data register (MDR) holds the instruction or data brought from main memory (RAM) over the data bus before it is decoded.
• The accumulator holds the result of an operation carried out by the ALU.
• Because registers are inside the CPU, the CPU can keep working on a value without going back to slower main memory during the cycle.

Working together as the cycle repeats

• In the fetch stage, the address of the next instruction is copied from the program counter into the memory address register and sent to main memory over the address bus, and the instruction comes back over the data bus into the memory data register.
• In the decode stage the control unit interprets the instruction and works out which components are needed for it.
• In the execute stage the control unit signals the ALU or main memory so that the instruction is carried out, and the result is held in a register.
• The clock sends a regular pulse so that the fetch, decode and execute stages of each instruction happen in step.
• The program counter is then incremented, so the cycle repeats with the address of the next instruction to be fetched.

Levels

• Level 0 (0 marks): No rewardable content.
• Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
• Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
• Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)

Additional guidance

• A list of correct but independent roles, with no linkage between the components and no reference to the stages of the cycle, is limited to Level 1; an answer that gives the roles of the components but does not link them to the fetch, decode and execute stages is limited to Level 2; a Level 3 answer must cover the control unit/ALU and registers and link them to the stages of the cycle.
• Award no credit for 'the control unit is the brain of the CPU', 'the ALU stores data' or 'registers are the same as RAM'; accept the program counter, MAR, MDR and accumulator as examples of registers, accept the clock, address bus, data bus and control bus where they are linked to a stage of the cycle, and accept 'main memory' or 'RAM' as equivalent.