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Edexcel GCSE Computer Science (1CP2) Exam Questions

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4 questions · 11 marks

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1Multiple choice1 markSecondary Memory Swap Remove

A computer has both primary and secondary storage.

Identify the role of secondary storage.

[1 mark]
  • ATo store data and programs permanently
  • BTo store data and instructions currently in use
  • CTo carry out calculations on data
  • DTo allow the CPU to access programs directly
Mark scheme
  • A To store data and programs permanently (1)
  • The only correct answer is A. The correct answer is to store data and programs permanently.
  • B is not correct because storing the data and instructions currently in use is the role of primary storage/RAM, which is volatile, not the role of secondary storage
  • C is not correct because calculations on data are carried out by the CPU, not by secondary storage
  • D is not correct because secondary storage is not directly accessible by the CPU; data must first be copied into RAM
Example answers and how they were marked
Full marks1/1

A To store data and programs permanently

Why: Correct option (1): storing data and programs permanently is the role of secondary storage, which is non-volatile.

No marks0/1

B To store data and instructions currently in use

Why: Near miss scoring 0: this describes primary storage/RAM, which is volatile, and is not the role of secondary storage (line B of the mark scheme). Only A is credited.

No marks0/1

D To allow the CPU to access programs directly

Why: Misconception scoring 0: candidates think the CPU reads programs straight from secondary storage, but secondary storage is not directly accessible by the CPU (line D).

2Describe2 marksSecondary Memory Swap Remove

A laptop uses a solid state drive (SSD) for secondary storage.

Describe how data is stored on a solid state drive.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • Data is stored on (flash) memory chips/cells (1) as a pattern of electrical charges (1)
  • A current/voltage forces electrons through a barrier (1) so that they are trapped (or not trapped) to hold/represent a value (1)
  • Cells with a trapped charge and cells with no trapped charge (1) represent 1s and 0s/binary (1)
  • The trapped charge remains when the power is turned off (1) so the data is not lost/it is non-volatile (1)

Do not accept responses that describe magnetic storage, e.g. magnetised platters, spinning disks or read/write heads, or optical storage, e.g. lasers, pits and lands.

Do not award a mark for 'it is solid state' or 'it has no moving parts' without a description of how the data is stored.

Do not award a mark for restating the stem, e.g. 'a laptop uses an SSD' or 'an SSD uses flash memory'.

'Data is stored as electrical charges' on its own, with no reference to memory chips/cells or to how the charge is held, earns a maximum of one mark (1).

A response that only describes electrons being trapped, with no link to how the value/data is represented, earns one mark (1). The second mark needs a link such as trapped and not trapped charge representing 1s and 0s, or the trapped charge being kept so the data is not lost.

Example answers and how they were marked
Full marks2/2

A current is used to force electrons through a barrier so that they become trapped, and a cell with a trapped charge or a cell with no trapped charge represents a 1 or a 0.

Why: Linked description: a current forces electrons through a barrier (1) and trapped/not trapped charge represents 1s and 0s (1).

Some marks1/2

The data is stored in flash memory chips.

Why: Gives the creditworthy point that data is stored on flash memory chips (1) but does not develop it, e.g. by saying the data is held as electrical charges or by describing trapped electrons.

No marks0/2

The data is stored as magnetised areas on a spinning platter.

Why: This describes magnetic storage, which the mark scheme says not to accept for a solid state drive.

3Describe2 marksStored Program Computers Swap Remove

The control unit (CU) is a component inside the CPU.

Describe the role of the control unit in the fetch-decode-execute cycle.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • Decodes each (fetched) instruction (1) to work out which operation is needed / which components should carry it out (1)
  • Coordinates/directs the other components (1) by sending control signals along the control bus (1)
  • Fetches the next instruction (1) by sending its address to main memory along the address bus (1)
  • Sends a read/write control signal to main memory (1) so that the instruction or data is transferred during the fetch/execute stage (1)

Do not accept answers about synchronising the CPU or timing the cycles (that is the role of the clock).

Do not accept answers about carrying out arithmetic or logical operations (that is the ALU).

Do not accept answers about holding data or the results of instructions (that is registers/main memory).

Do not accept generic answers that only say the CU controls the CPU or processes instructions, with no linked development.

Only award one mark for a response that only repeats that the CU sends control signals; the second mark needs a linked outcome such as coordination, a memory read/write, or fetching an instruction.

Do not accept 'during the decode stage' as the development for the decoding point, as it restates the question.

Example answers and how they were marked
Full marks2/2

It decodes the instruction that has been fetched so that it knows which operation the CPU must carry out and which components should do it.

Why: Decoding named with the acceptable wording 'each (fetched) instruction' (1), plus the linked development that this identifies the operation and components (1).

Some marks1/2

It decodes each instruction during the decode stage of the cycle.

Why: Earns (1) for decoding the instruction. 'During the decode stage' restates the question and is not accepted as a development, so the second mark is not earned.

No marks0/2

It carries out the calculations and comparisons when the instruction is executed.

Why: Calculations and comparisons are the ALU's role, which the 'Do not accept' line rules out, so no mark is earned.

4Discuss6 marksFetch Decode Execute Cycle Swap Remove

A small robotics company is designing a new robot. The robot's computer uses von Neumann architecture. The engineers are explaining how programs are stored and run.

Discuss how the von Neumann stored program concept and main memory (RAM) are used during the fetch-decode-execute cycle.

Your answer should include:

  • what is meant by the stored program concept
  • the role of RAM in the cycle
  • why the stored program concept is useful.
[6 marks]
Mark scheme

Indicative content

Stored program concept

  • Instructions and data are stored together in the same main memory (RAM).
  • Instructions are fetched one at a time from memory and executed in sequence.
  • The program can be changed by loading different instructions into RAM.
  • The CPU can only execute instructions that are in main memory.

Role of RAM

  • RAM holds the program instructions and the data being used.
  • The address of the next instruction is held in the program counter (PC).
  • The instruction is fetched from RAM using the address bus.
  • The data bus carries the instruction from RAM to the CPU.
  • RAM is volatile, so programs are lost when power is off.
  • RAM is directly accessible by the CPU, unlike secondary storage.

Benefits

  • The same hardware can run many different programs.
  • Programs can be loaded and changed quickly.
  • No need to rewire the computer for a new task.
  • Makes general-purpose computers possible.

Levels

  • Level 0 (0 marks): No rewardable content.
  • Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
  • Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
  • Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)
Example answers and how they were marked
Full marks6/6

The von Neumann stored program concept means that both the program instructions and the data are stored together in the same main memory, RAM. During the fetch-decode-execute cycle, the CPU fetches an instruction from RAM, decodes it in the control unit, and then executes it. The program counter holds the address of the next instruction, and this address is sent along the address bus to RAM. RAM then returns the instruction along the data bus to the CPU. RAM is volatile, so it only holds the program while the robot is powered on. The stored program concept is useful because the robot's computer can run different programs without changing any hardware; new instructions can simply be loaded into RAM. This makes the computer general-purpose and flexible.

Why: Comprehensive understanding: defines stored program concept, explains RAM role with PC, address bus and data bus, applies to robot, and gives benefits. Sustained lines of reasoning. Level 3.

Some marks3/6

The stored program concept is when instructions and data are stored in RAM. The CPU fetches instructions from RAM. The program counter keeps the address of the next instruction. RAM holds the program. The benefit is that you can change the program without rewiring the computer.

Why: Adequate understanding: correct basic points about stored program concept and RAM, with some linkage, but little development or application to the robot's fetch-decode-execute cycle. Level 2.

Some marks1/6

The von Neumann stored program concept is that the CPU uses RAM to store the program. The fetch-decode-execute cycle fetches, decodes and executes. RAM is random access memory. The benefit is that it is fast.

Why: Basic independent points only; no real linkage or application to the robot. Level 1.

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