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Edexcel GCSE Computer Science (1CP2) Exam Questions

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4 questions · 11 marks

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1Short recall2 marksSecondary Memory Swap Remove

A computer uses secondary storage to keep programs and data.

Give two examples of secondary storage devices that store data using magnetic media.

[2 marks]
Mark scheme

Award one mark for any of the following up to a maximum of two marks:

  • Hard disk drive/HDD (1)
  • External/portable hard disk drive (1)
  • Magnetic tape drive (1)
  • Magnetic tape (1)

Allow a named device or the storage media type, e.g. hard disk/hard disc for hard disk drive, tape for magnetic tape

Allow floppy disk/floppy disk drive

Do not accept solid state devices (SSD, USB flash drive/memory stick, SD card/memory card) or optical media (CD/DVD/Blu-ray) as these do not store data using magnetism

Example answers and how they were marked
Full marks2/2

Hard disk drive and magnetic tape

Why: Hard disk drive (1) and magnetic tape (1) are both magnetic secondary storage, so both marks are awarded.

Some marks1/2

Hard disk drive and SD card

Why: Hard disk drive is magnetic (1); an SD card is solid state, not magnetic, so the second mark is not awarded.

No marks0/2

CD and DVD

Why: Both are optical media, which the mark scheme says not to accept, so no marks are awarded.

2Short recall1 markSecondary Memory Swap Remove

Data is stored on optical discs as pits and lands.

Name the component in an optical disc drive that reads this data.

[1 mark]
Mark scheme

Award one mark for:

  • Laser (1)

Allow laser beam

Do not accept read/write head

Do not accept pits

Do not accept lands

Do not accept reflective surface

Do not accept magnet/magnetic

Example answers and how they were marked
Full marks1/1

Laser

Why: Laser is the creditworthy answer (1).

No marks0/1

A read/write head

Why: Read/write head is not accepted by the mark scheme; it reads magnetic media, not optical discs, so no marks are awarded.

No marks0/1

Pits and lands

Why: Pits and lands are what the laser reads, not the component that reads the data, so the mark scheme does not accept them.

3Explain2 marksFetch Decode Execute Cycle Swap Remove

The CPU carries out the fetch-decode-execute cycle.

Explain one reason why the address bus is used in the fetch stage of the fetch-decode-execute cycle.

[2 marks]
Mark scheme

Award up to two marks for a linked explanation such as:

  • The address bus carries the address of the next instruction (1) so the CPU can locate/fetch it from main memory/RAM (1)
  • The address bus carries the address of the memory location to be read (1) so the instruction/data stored there can be located/accessed (1)
  • The CPU needs to know where the next instruction is stored (1) so the address bus sends the address to main memory/RAM (1)

For both marks, the expansion must follow/associate with the statement.

Allow 'from the program counter/PC' as part of the point for one mark, e.g. the address bus carries the address from the program counter (1), but the second mark needs the destination or purpose (e.g. to locate/fetch the instruction in main memory/RAM).

Do not award the second mark for naming the program counter/PC alone.

Do not accept answers that say the address bus carries data/instructions from main memory to the CPU, as these travel on the data bus.

Do not accept answers that say the address bus stores the address.

Do not allow an answer that only restates that the address bus carries addresses without saying which address or why it is needed.

Example answers and how they were marked
Full marks2/2

The address bus carries the address of the next instruction from the program counter to main memory, so that the CPU can locate the instruction that is to be fetched.

Why: Linked point (1) and reason (1).

Some marks1/2

The address bus carries the address of the next instruction from the program counter.

Why: Point only (1); the second mark is not awarded because the destination/purpose of locating or fetching the instruction is missing.

No marks0/2

It carries the instruction from main memory back to the CPU so that it can be decoded.

Why: Misconception: instructions travel on the data bus, which the mark scheme's Do not accept line covers.

4Discuss6 marksStored Program Computers Swap Remove

A school is buying new desktop computers for its computer science classroom. The teacher explains that each computer uses the von Neumann stored program concept: the program instructions and the data are stored together in main memory, and the CPU runs each instruction by carrying out the fetch-decode-execute cycle.

Discuss the role of the control unit, the arithmetic logic unit (ALU) and registers in the fetch-decode-execute cycle.

Your answer should include:

  • how an instruction is fetched from main memory and decoded
  • how the ALU executes an instruction
  • how registers are used during the cycle.
[6 marks]
Mark scheme

Indicative content

Fetching and decoding an instruction

  • The register that holds the address of the next instruction (the program counter) contains the address of the instruction to be fetched.
  • This address is sent to main memory (RAM) and the instruction is copied from main memory into a register inside the CPU.
  • The program counter is updated so that it holds the address of the next instruction in the program.
  • The control unit decodes the instruction that has been fetched, working out which operation is required and which data or registers are needed.
  • The control unit sends control signals to coordinate the other components as the instruction is carried out.
  • The control unit decides what happens next, for example after a comparison it decides whether the next instruction is the following one or a jump.

The arithmetic logic unit (ALU) executes an instruction

  • The control unit directs the arithmetic logic unit (ALU) to carry out the operation.
  • The ALU performs arithmetic operations such as addition, subtraction, multiplication and division, for example adding two values in a program written by the class.
  • The ALU performs logical operations such as comparing two values to see if they are equal or whether one is greater than the other.
  • The result of the operation carried out by the ALU is passed back and stored in a register.
  • The ALU operates on data that has been fetched from main memory; it does not fetch the instruction and it does not decide which instruction is next.

Registers

  • Registers are small, very fast memory locations inside the CPU.
  • They hold the data, addresses and results that the CPU is working on during the cycle.
  • Registers are used in every stage of the cycle, not only when the ALU produces a result.
  • Because registers are inside the CPU they can be read and written much faster than main memory during the cycle.

Levels

  • Level 0 (0 marks): No rewardable content.
  • Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
  • Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
  • Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)
  • A Level 3 answer must link the roles of all three components to the fetch, decode and execute stages. An answer that links only one component to a stage, with the other points listed separately, is Level 1 (1–2 marks); an answer that links two of the components to stages is Level 2 (3–4 marks). A point repeated under more than one heading is credited once only.
  • Accept 'the program counter', 'the address register' or 'a register holding the address of the next instruction' as the register that holds the address of the next instruction. Do not accept 'the control unit performs the calculations', 'the ALU controls the timing of the CPU' / 'the ALU sends the clock signal' or 'registers are in main memory (RAM)'.
Example answers and how they were marked
Full marks6/6

In the fetch stage, a register called the program counter holds the address of the next instruction and this address is sent to main memory. The instruction is copied from main memory into a register in the CPU and the program counter is updated so that it points to the next instruction. The control unit then decodes the instruction in the decode stage, working out which operation is required and which data or registers are needed, and it sends control signals to coordinate the other components. In the execute stage the control unit directs the ALU to carry out the operation the class's program needs: the ALU does arithmetic, such as adding two values, or a logical comparison, such as checking whether one value is greater than another, and it does not decide what happens next, the control unit does. The result from the ALU is stored in a register, and because registers hold the data, addresses and results at every stage, the cycle can repeat with the next instruction.

Why: Level 3: the role of each component is linked to the stage it works in (program counter and registers in fetch, control unit decoding and deciding next, ALU executing and its result stored in a register) across all three stages, with the classroom context.

Some marks2/6

The control unit decodes the instruction in the decode stage. The ALU does maths and logic, such as addition and comparing numbers. Registers store data inside the CPU. In the fetch stage the instruction is fetched from the RAM and put into the CPU.

Why: Level 1: several correct basic points that the mark scheme credits (the instruction is fetched from main memory into the CPU, the control unit decodes the instruction, the ALU does arithmetic and logical operations, registers store data) but only the control unit is linked to a stage of the cycle, so the answer is top of Level 1.

Some marks1/6

The control unit decodes instructions. The ALU controls the timing of the CPU and sends the clock signal. Registers are in the RAM and they store the program.

Why: Level 1: one basic point, that the control unit decodes instructions (1). The other statements are on the do-not-accept list (the ALU does not control the timing of the CPU or send the clock signal, and registers are in the CPU, not main memory), so they earn no credit.

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