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Edexcel GCSE Computer Science (1CP2) Exam Questions

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4 questions · 16 marks

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1Describe2 marksSecondary Memory Swap Remove

A computer uses a magnetic hard disk.

Describe how data is stored on a magnetic hard disk.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • A read/write head moves over the surface of the disk (1) to read/write data by detecting or changing the magnetic alignment of areas of the surface (1)
  • The head magnetises areas of the disk surface in different directions (1) so each area represents a binary 1 or 0 (1)
  • Data is stored on concentric circles called tracks (1) which are divided into sectors (1)

Allow one mark for tracks/concentric circles on their own.

For the second mark in the first two bullets, the response must refer to the magnetic alignment/charge being detected or changed, not just that the head reads/writes data.

Do not award a mark for 'it is magnetic' or 'it stores data in binary' with no description of how the data is stored.

Do not accept descriptions of optical storage (e.g. a laser, pits and lands) or solid state storage (e.g. electric charges in chips).

Example answers and how they were marked
Full marks2/2

The read/write head moves over the magnetic surface and magnetises areas of the disk to store the 1s and 0s.

Why: Head moves over the surface (1) and magnetises areas to represent 1s and 0s (1).

Some marks1/2

The data is stored on tracks on the disk.

Why: Tracks/concentric circles (1), but no development such as tracks divided into sectors.

No marks0/2

It is magnetic and saves the data in 1s and 0s.

Why: Near-miss: 'magnetic' alone and 'data in binary/1s and 0s' with no description of how data is stored, which the mark scheme does not award.

2Explain2 marksFetch Decode Execute Cycle Swap Remove

The CPU carries out the fetch-decode-execute cycle.

Explain one reason why the address bus is used in the fetch stage of the fetch-decode-execute cycle.

[2 marks]
Mark scheme

Award up to two marks for a linked explanation such as:

  • The address bus carries the address of the next instruction (1) so the CPU can locate/fetch it from main memory/RAM (1)
  • The address bus carries the address of the memory location to be read (1) so the instruction/data stored there can be located/accessed (1)
  • The CPU needs to know where the next instruction is stored (1) so the address bus sends the address to main memory/RAM (1)

For both marks, the expansion must follow/associate with the statement.

Allow 'from the program counter/PC' as part of the point for one mark, e.g. the address bus carries the address from the program counter (1), but the second mark needs the destination or purpose (e.g. to locate/fetch the instruction in main memory/RAM).

Do not award the second mark for naming the program counter/PC alone.

Do not accept answers that say the address bus carries data/instructions from main memory to the CPU, as these travel on the data bus.

Do not accept answers that say the address bus stores the address.

Do not allow an answer that only restates that the address bus carries addresses without saying which address or why it is needed.

Example answers and how they were marked
Full marks2/2

The address bus carries the address of the next instruction from the program counter to main memory, so that the CPU can locate the instruction that is to be fetched.

Why: Linked point (1) and reason (1).

Some marks1/2

The address bus carries the address of the next instruction from the program counter.

Why: Point only (1); the second mark is not awarded because the destination/purpose of locating or fetching the instruction is missing.

No marks0/2

It carries the instruction from main memory back to the CPU so that it can be decoded.

Why: Misconception: instructions travel on the data bus, which the mark scheme's Do not accept line covers.

3Discuss6 marksPrimary Memory Swap Remove

A school is buying new computers for its IT room. The computers the technician has ordered have 16 GB of RAM and a large hard drive.

Discuss why main memory (RAM) is needed for programs to run on these computers.

Your answer should include:

  • the role of RAM in the stored program concept
  • what happens to a program when it is opened
  • why the CPU cannot execute a program directly from secondary storage.
[6 marks]
Mark scheme

Indicative content

the role of RAM in the stored program concept

  • In the von Neumann stored program concept, a program's instructions and the data it uses are held together in main memory.
  • RAM holds the instructions and data of the program that the CPU is currently processing.
  • The CPU fetches each instruction from RAM during the fetch-decode-execute cycle, so a program must be in RAM before it can be run.
  • RAM is directly accessible by the CPU, so instructions can be fetched quickly enough for the CPU to keep working.

what happens to a program when it is opened

  • When a program is opened, a copy of its instructions and data is transferred from secondary storage, such as the hard drive, into RAM.
  • The operating system loads the program into RAM so that the CPU can start fetching and executing its instructions.
  • When the program is closed, it is removed from RAM, and the space it used is free for another program.
  • If a computer does not have enough RAM, the program may not open, or another open program has to be closed first.

why the CPU cannot execute a program directly from secondary storage

  • Secondary storage, such as a hard disk drive, is much slower to access than RAM.
  • The CPU can process instructions much faster than secondary storage can supply them, so the CPU would have to wait and would not be working at full speed.
  • RAM is fast electronic memory with no moving parts, so data can be read from it in a fraction of the time taken by a magnetic hard disk drive.
  • Running the school's programs directly from secondary storage would make the computers in the IT room very slow to use.

Levels

  • Level 0 (0 marks): No rewardable content.
  • Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
  • Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
  • Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)

Additional guidance

  • Level 3 responses must cover both the role of RAM in the stored program concept and the speed difference between RAM and secondary storage, with a reason such as the CPU having to wait for instructions.
  • Answers that make only basic, independent points, such as what RAM is, that a program is copied into RAM when it is opened, or that RAM is faster than a hard drive, without linking them to explain why the CPU would have to wait for instructions, are limited to Level 1.
  • Do not accept statements that RAM is permanent storage, that RAM replaces secondary storage, or that secondary storage is read-only.
Example answers and how they were marked
Full marks6/6

The computers need RAM because of the von Neumann stored program concept, in which the instructions of a program and the data it uses are both held in main memory. When a student opens a program on one of the new computers, the operating system copies it from the hard drive into RAM. The CPU then fetches each instruction from RAM in the fetch-decode-execute cycle, so the program must be in RAM before it can be run. The CPU cannot execute a program directly from secondary storage because a hard disk drive is much slower than RAM. It has moving parts and a much lower transfer rate, so the CPU would often have nothing to do while it waited for the next instruction. RAM is fast electronic memory that the CPU can read directly, which is why 16 GB of RAM lets the school run several programs at once and still keep the CPU working at full speed.

Why: Comprehensive understanding: the stored program concept is explained (instructions and data held in main memory), the program being opened is linked to it, and the speed difference is developed with the reason that the CPU would wait for instructions, all applied to the school's computers. Level 3.

Some marks2/6

RAM is the main memory of the computer. It stores the programs and data that are being used at the moment. When you open a program it is copied into RAM, and the CPU fetches instructions from RAM. RAM is faster than the hard drive, so a program runs better from RAM. Having 16 GB means the school can have more programs open at once.

Why: Basic, independent points only: what RAM is, that a program is copied into RAM when it is opened, that the CPU fetches instructions from RAM, and that RAM is faster than a hard drive. None is linked to the stored program concept or developed to explain why the CPU would have to wait for instructions, so Level 1, 2 marks.

No marks0/6

RAM is the permanent storage inside the computer, like a hard drive. The school needs 16 GB of RAM so that all the students' files can be saved permanently. When a program is opened, it is copied from RAM to the CPU. The CPU cannot execute from secondary storage because secondary storage is read-only.

Why: No creditworthy points. RAM is described as permanent storage, files are said to be saved permanently in RAM, a program is said to be copied from RAM to the CPU, and secondary storage is said to be read-only. All are the misconceptions listed in the Do not accept guidance, so Level 0.

4Discuss6 marksStored Program Computers Swap Remove

A college is buying new computers for its computer science classroom. A technician explains that the CPU uses three buses to communicate with main memory and other components.

Discuss the role of the address bus, the data bus and the control bus in the fetch-decode-execute cycle.

Your answer should include:

  • what each bus carries
  • the direction in which each bus carries it
  • the role of the buses in the fetch-decode-execute cycle.
[6 marks]
Mark scheme

Indicative content

What each bus carries

  • The address bus carries the address of a memory location that the CPU wants to read from or write to.
  • The data bus carries data and instructions between the CPU and main memory, and between the CPU and other components such as the input and output controllers.
  • The control bus carries control signals, such as read and write, that coordinate the activities of the computer.
  • The clock is a separate component that sends regular pulses, and the control bus carries the signals that keep the other components in time with those pulses.

Direction

  • The address bus is one-way, carrying addresses from the CPU to main memory.
  • The data bus is two-way, so data and instructions can travel both to and from the CPU.
  • The control bus carries control signals from the control unit to the other components, and it is not the clock signal itself.
  • The number of bits in the address bus determines how many memory locations can be addressed, and the number of bits in the data bus determines how much can be transferred at one time.

The role of the buses in the fetch-decode-execute cycle

  • Fetch: the address of the next instruction, held in a register in the CPU, is placed on the address bus so that main memory knows which location to read.
  • Fetch: the control unit sends a read signal on the control bus to main memory.
  • Fetch: the instruction held in that location is returned to the CPU on the data bus.
  • Decode: the control unit decodes the instruction and sends control signals on the control bus to set up the other components, for example telling the ALU which operation to carry out.
  • Execute: the address of any data needed is placed on the address bus, a read or write signal is sent on the control bus, and the data itself travels between the CPU and main memory on the data bus.
  • The cycle repeats, with each step taking place in time with a pulse from the clock.

Level 3 responses must cover all three buses and link them to the fetch-decode-execute cycle, including the fetch stage and at least one of the decode and execute stages. Answers that describe each bus correctly but link none of them to a stage of the cycle are limited to Level 1.

Do not accept 'the address bus carries data', 'the data bus carries addresses', 'the data bus carries instructions only during the fetch stage', 'the control bus carries the clock signal' or 'the control bus is the clock'; the clock is a separate component whose pulses the control signals coordinate with.

Levels

  • Level 0 (0 marks): No rewardable content.
  • Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
  • Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
  • Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)
Example answers and how they were marked
Full marks6/6

At the start of the fetch stage the address of the next instruction, which is held in a register, is placed on the address bus, which is one-way, so that main memory knows which location to read. The control unit sends a read signal on the control bus, and the instruction held at that address is returned to the CPU on the data bus, which is two-way. In the decode stage the control unit works out what the instruction means and sends control signals on the control bus to set up the other components, for example telling the ALU which operation to carry out. In the execute stage, if the instruction needs data from memory, the address of that data is placed on the address bus, a read or write signal is sent on the control bus and the data itself travels on the data bus. Every step happens on a pulse from the clock, which is a separate component, and the control bus carries the signals that keep the components in time with it. The widths of the buses matter too: more address bits mean more memory locations can be addressed and more data bits mean more can be moved at once.

Why: Level 3 (6 marks): all three buses are covered, with what each carries and its direction, and each is linked to the fetch, decode and execute stages, plus the role of the clock and the effect of bus widths.

Some marks2/6

The address bus carries addresses from the CPU to the memory and it is one-way. The data bus carries data and it is two-way. The control bus carries control signals. During the fetch stage the CPU fetches the instruction from memory using these buses.

Why: Level 1 (2 marks): each bus is named with a basic correct statement (address bus carries addresses one-way, data bus is two-way, control bus carries control signals), but no bus is linked to a stage of the cycle, so the guidance line limits this to Level 1; the general mention of the fetch stage is not tied to any bus.

No marks0/6

The address bus carries the data to the CPU. The data bus carries the addresses to the memory. The control bus is the clock that makes the CPU run faster.

Why: Level 0 (0 marks): the address bus and data bus roles are swapped, which the scheme says not to accept, and the control bus is wrongly described as the clock, which is also not accepted, so there is no rewardable content.

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