Edexcel GCSE Computer Science (1CP2) Exam Questions

Award one mark for any of the following up to a maximum of two marks:

• The program instructions and data are stored together in main memory/RAM (1)
• The same memory is used for both instructions and data (1)
• The instructions are fetched from main memory and executed by the CPU (1)
• The instructions are fetched and executed one at a time / in sequence (1)
• The program can be changed/replaced by loading new instructions into memory, without changing the hardware (1)

Do not accept the program is stored in secondary storage / on the hard disk.

Do not accept the program is stored in the CPU / in registers.

Award up to two marks for a linked explanation such as:

• (The ECU) is more reliable/less likely to crash (1) because it only runs the one program/has a single purpose (1)
• (The ECU) cannot be affected by other software/viruses (1) because it cannot run other software/it can only run the program it was made for (1)
• (The ECU) is cheaper (1) because it has limited processing resources/less memory/simple components (1)
• (The ECU) uses less power (1) because it has limited processing resources/a simpler processor (1)
• (The ECU) is smaller (1) because it has fewer components/less memory than a general purpose computer (1)

For both marks, the expansion must follow/associate with the statement.

A suitable benefit stated on its own earns one mark.

Do not accept a description or a location given as the reason, e.g. 'because it is part of the car', 'because it is inside the engine', 'because it is embedded'.

Do not accept a description of an embedded system on its own as the benefit, e.g. 'it does one specific job' or 'it is part of the car'.

Do not accept 'it is faster'/'it has a more powerful processor' as embedded systems have limited processing resources.

Indicative content

Why the report was lost

• The report was being created and edited in RAM, which is volatile.
• Volatile memory loses its contents when the power supply is removed.
• The power cut removed the power, so the data in RAM was lost.
• The report had not been saved to secondary storage before the power cut.
• Only data that had been saved to secondary storage would remain after the power cut.

The difference between RAM and secondary storage

• RAM is volatile and holds data temporarily while the computer is on.
• Secondary storage is non-volatile and keeps data permanently when the power is off.
• RAM is directly accessible by the CPU and is much faster than secondary storage.
• Secondary storage has a larger capacity and is cheaper per gigabyte than RAM.
• RAM holds the programs and data currently in use; secondary storage holds files for long-term storage.

How the employee could prevent this in future

• The employee should save the report regularly to secondary storage, such as the hard drive or a USB flash drive.
• The employee could enable autosave or autosave/recovery features in the word processor.
• The employee could use cloud storage that saves changes automatically.
• The employee could use an uninterruptible power supply (UPS) or battery to keep the laptop on during a power cut.
• The employee should not rely on RAM to keep work permanently.

Levels

• Level 0 (0 marks): No rewardable content.
• Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
• Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
• Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)

Additional guidance

• Level 3 responses must explain that RAM is volatile and contrast this with non-volatile secondary storage.
• Do not award marks for stating that the report was lost from secondary storage unless it had been saved there.

Indicative content

What each bus carries

• The address bus carries the address of a memory location that the CPU wants to read from or write to.
• The data bus carries data and instructions between the CPU and main memory, and between the CPU and other components such as the input and output controllers.
• The control bus carries control signals, such as read and write, that coordinate the activities of the computer.
• The clock is a separate component that sends regular pulses, and the control bus carries the signals that keep the other components in time with those pulses.

Direction

• The address bus is one-way, carrying addresses from the CPU to main memory.
• The data bus is two-way, so data and instructions can travel both to and from the CPU.
• The control bus carries control signals from the control unit to the other components, and it is not the clock signal itself.
• The number of bits in the address bus determines how many memory locations can be addressed, and the number of bits in the data bus determines how much can be transferred at one time.

The role of the buses in the fetch-decode-execute cycle

• Fetch: the address of the next instruction, held in a register in the CPU, is placed on the address bus so that main memory knows which location to read.
• Fetch: the control unit sends a read signal on the control bus to main memory.
• Fetch: the instruction held in that location is returned to the CPU on the data bus.
• Decode: the control unit decodes the instruction and sends control signals on the control bus to set up the other components, for example telling the ALU which operation to carry out.
• Execute: the address of any data needed is placed on the address bus, a read or write signal is sent on the control bus, and the data itself travels between the CPU and main memory on the data bus.
• The cycle repeats, with each step taking place in time with a pulse from the clock.

Level 3 responses must cover all three buses and link them to the fetch-decode-execute cycle, including the fetch stage and at least one of the decode and execute stages. Answers that describe each bus correctly but link none of them to a stage of the cycle are limited to Level 1.

Do not accept 'the address bus carries data', 'the data bus carries addresses', 'the data bus carries instructions only during the fetch stage', 'the control bus carries the clock signal' or 'the control bus is the clock'; the clock is a separate component whose pulses the control signals coordinate with.

Levels

• Level 0 (0 marks): No rewardable content.
• Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
• Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
• Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)