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Edexcel GCSE Computer Science (1CP2) Exam Questions

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4 questions · 12 marks

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1Short recall2 marksPrimary Memory Swap Remove

A computer is designed using the von Neumann stored program concept.

Define the term stored program concept.

[2 marks]
Mark scheme

Award one mark for any of the following up to a maximum of two marks:

  • The program instructions and data are stored together in main memory/RAM (1)
  • The same memory is used for both instructions and data (1)
  • The instructions are fetched from main memory and executed by the CPU (1)
  • The instructions are fetched and executed one at a time / in sequence (1)
  • The program can be changed/replaced by loading new instructions into memory, without changing the hardware (1)

Do not accept the program is stored in secondary storage / on the hard disk.

Do not accept the program is stored in the CPU / in registers.

Example answers and how they were marked
Full marks2/2

The program instructions and the data are stored together in main memory, and the CPU fetches the instructions one at a time and executes them.

Why: Creditworthy point that instructions and data are stored in the same main memory (1) and the linked point that the CPU fetches and executes them from memory (1).

Some marks1/2

The program is held in the main memory (RAM) so that the computer can run it.

Why: Earns the point that the program instructions are stored in main memory (1), but does not say that the CPU fetches and executes them, so the second mark is not earned.

No marks0/2

The program is stored on the hard disk and loaded into the CPU when it is run.

Why: Both parts are misconceptions named in the Do not accept lines: the stored program concept keeps the instructions in main memory, not on secondary storage or in the CPU.

2Describe2 marksEmbedded Systems Swap Remove

A greenhouse uses an embedded system to control the growing conditions for plants.

Describe how the embedded system controls the growing conditions in the greenhouse.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • It reads/monitors the temperature/humidity/light level using sensors (1) to switch the heaters/vents/lamps/watering system on or off when the reading is outside the set range (1)
  • It compares the readings from the sensors with the set values/thresholds stored in its memory (1) to decide whether the conditions need to be changed (1)
  • It monitors the light level using a light sensor (1) and turns the lamps on when the light falls below the level the plants need (1)
  • It monitors the soil moisture using a soil moisture sensor (1) and turns the water pump/irrigation on when the soil is too dry (1)

For the second mark, the action/response must be linked to the sensor reading given in the first point.

Allow named sensors (temperature/humidity/light/soil moisture) and named outputs (heater, fan, vent/window, lamp, irrigation/water pump).

Do not accept answers that only name a sensor or only name an output, e.g. 'it has a temperature sensor and a heater', as there is no link between the reading and the control action.

Do not accept answers where a person switches the equipment on or off, as the embedded system controls the conditions automatically.

Example answers and how they were marked
Full marks2/2

The embedded system reads the temperature using a sensor and switches the heater on when the temperature is below the set value.

Why: Sensor reading point (1) and linked control action (1).

Some marks1/2

The embedded system compares the readings from the sensors with the set values stored in its memory.

Why: First point only (1) - the comparison with stored values - with no linked action.

No marks0/2

The greenhouse has a temperature sensor and a heater.

Why: Only names a sensor and an output, which the mark scheme says is not accepted.

3Describe2 marksSecondary Memory Swap Remove

A laptop uses a solid state drive (SSD) for secondary storage.

Describe how data is stored on a solid state drive.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • Data is stored on (flash) memory chips/cells (1) as a pattern of electrical charges (1)
  • A current/voltage forces electrons through a barrier (1) so that they are trapped (or not trapped) to hold/represent a value (1)
  • Cells with a trapped charge and cells with no trapped charge (1) represent 1s and 0s/binary (1)
  • The trapped charge remains when the power is turned off (1) so the data is not lost/it is non-volatile (1)

Do not accept responses that describe magnetic storage, e.g. magnetised platters, spinning disks or read/write heads, or optical storage, e.g. lasers, pits and lands.

Do not award a mark for 'it is solid state' or 'it has no moving parts' without a description of how the data is stored.

Do not award a mark for restating the stem, e.g. 'a laptop uses an SSD' or 'an SSD uses flash memory'.

'Data is stored as electrical charges' on its own, with no reference to memory chips/cells or to how the charge is held, earns a maximum of one mark (1).

A response that only describes electrons being trapped, with no link to how the value/data is represented, earns one mark (1). The second mark needs a link such as trapped and not trapped charge representing 1s and 0s, or the trapped charge being kept so the data is not lost.

Example answers and how they were marked
Full marks2/2

A current is used to force electrons through a barrier so that they become trapped, and a cell with a trapped charge or a cell with no trapped charge represents a 1 or a 0.

Why: Linked description: a current forces electrons through a barrier (1) and trapped/not trapped charge represents 1s and 0s (1).

Some marks1/2

The data is stored in flash memory chips.

Why: Gives the creditworthy point that data is stored on flash memory chips (1) but does not develop it, e.g. by saying the data is held as electrical charges or by describing trapped electrons.

No marks0/2

The data is stored as magnetised areas on a spinning platter.

Why: This describes magnetic storage, which the mark scheme says not to accept for a solid state drive.

4Discuss6 marksFetch Decode Execute Cycle Swap Remove

A school is upgrading the desktop computers in its computer science classroom. Each computer has a CPU, main memory and buses. The technician is explaining how the CPU uses these components during the fetch-decode-execute cycle.

Discuss how the CPU uses its components and the buses during the fetch-decode-execute cycle.

Your answer should consider:

  • the role of the CPU and registers
  • the role of the address bus, data bus and control bus
  • the role of the clock.
[6 marks]
Mark scheme

Indicative content

The role of the CPU and registers

  • The control unit decodes the instruction fetched from main memory and controls the other components during the cycle.
  • The ALU carries out arithmetic and logical operations during the execute stage, such as adding two values held in registers.
  • Registers hold the data, addresses and results that the CPU is working on during the cycle.
  • The program counter holds the address of the next instruction to be fetched, so it is incremented after each fetch.
  • The memory address register holds the address of the memory location that is about to be read or written.
  • The memory data register holds the instruction or data that has been fetched from or is being written to main memory.

The role of the address bus, data bus and control bus

  • The address bus carries the address of the memory location that the CPU needs to access from the CPU to main memory.
  • The address bus is one-way, so addresses are only sent from the CPU to main memory.
  • The data bus carries instructions and data between the CPU and main memory, so it is bi-directional.
  • The width of the data bus affects how many bits can be transferred at one time.
  • The control bus carries control signals such as read and write signals, so main memory knows whether the CPU wants to read an instruction or write data.
  • The control bus carries signals from the control unit to coordinate the components during the fetch-decode-execute cycle.

The role of the clock

  • The clock sends regular pulses that synchronise the actions of the CPU and main memory.
  • Each clock pulse triggers the next step of the fetch-decode-execute cycle, so the stages happen in the correct order.
  • The clock provides a regular timing signal so that the fetch-decode-execute cycle repeats at a steady rate.
  • The clock is separate from the control bus; the control bus carries control signals, while the clock provides timing pulses.
  • Do not credit the address bus storing addresses, the data bus storing data, or the control bus controlling the computer without naming a control signal; do not credit clock speed affecting performance as a role in the cycle.
  • Level 3 responses must cover all three bullets and link them to the fetch-decode-execute cycle; Level 2 answers may identify roles but link them only partly to the cycle.

Levels

  • Level 0 (0 marks): No rewardable content.
  • Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
  • Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
  • Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)
Example answers and how they were marked
Full marks6/6

The control unit decodes each instruction that is fetched from main memory and then controls the other components to execute it. The program counter holds the address of the next instruction, and this address is copied to the memory address register before it is sent along the address bus. The address bus carries this address from the CPU to main memory, and it is one-way. The data bus then carries the instruction back from main memory to the CPU; it is bi-directional, so it can also carry data to be written. The memory data register holds the instruction that has been fetched. The control bus carries read and write signals from the control unit, so memory knows whether the CPU wants to read an instruction or write data. During the execute stage, the ALU performs arithmetic or logical operations on data held in registers. The clock sends regular pulses that synchronise each stage, so one fetch, decode or execute step happens on each tick and the cycle repeats in the correct order.

Why: Comprehensive understanding of the CPU, registers, all three buses and the clock, with sustained application to the fetch-decode-execute cycle. Level 3.

Some marks4/6

The address bus carries the address of the next instruction from the program counter to main memory so it can be fetched. The data bus carries the instruction back to the CPU, and it is bi-directional. The control unit decodes the instruction. The clock sends pulses to keep the stages in order.

Why: Adequate understanding of some roles with some linkage to the fetch-decode-execute cycle, but the control bus, ALU and most registers are not covered. Level 2.

Some marks1/6

The data bus carries data between the CPU and RAM. The address bus stores the addresses that the CPU needs. The control bus controls the computer. The clock is the speed of the CPU.

Why: One basic, independent point (the data bus carries data) (1). The address bus does not store addresses, the control bus point names no control signal and clock speed is not a role in the cycle, so no further credit. Level 1.

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