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Edexcel GCSE Computer Science (1CP2) Exam Questions

Build a practice paper from 659 exam-style questions, each with its mark scheme and example answers. Print it, or answer it on paper and then open the mark schemes. Or browse the questions by topic.

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4 questions · 5 marks

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1Multiple choice1 markPrimary Memory Swap Remove

Identify what is fetched from RAM during the fetch stage.

[1 mark]
  • AThe next instruction
  • BThe data at a memory address
  • CThe decoded instruction
  • DThe address of the next instruction
Mark scheme
  • A The next instruction (1)
  • The only correct answer is A. The correct answer is the next instruction.
  • B is not correct because data is fetched during the execute stage
  • C is not correct because an instruction is decoded after it is fetched
  • D is not correct because the program counter holds the address used to fetch the instruction
Example answers and how they were marked
Full marks1/1

A The next instruction

Why: The next instruction is fetched from RAM during the fetch stage (1).

No marks0/1

B The data at a memory address

Why: Near miss: data is not fetched during the fetch stage; data is used during the execute stage.

No marks0/1

C The decoded instruction

Why: Misconception: an instruction is decoded after it is fetched, in the decode stage.

2Multiple choice1 markStored Program Computers Swap Remove

Identify the bus that carries addresses in one direction only, from the CPU to main memory.

[1 mark]
  • AAddress bus
  • BControl bus
  • CData bus
  • DSystem bus
Mark scheme
  • A Address bus (1)
  • The only correct answer is A. The correct answer is address bus. Do not accept 'address' on its own.
  • B is not correct because the control bus carries control signals in both directions between the CPU and other components
  • C is not correct because the data bus carries data in both directions between the CPU and main memory
  • D is not correct because the system bus is the collection of all three buses
Example answers and how they were marked
Full marks1/1

A Address bus

Why: Correct option: the address bus carries addresses in one direction only, from the CPU to main memory (1).

No marks0/1

C Data bus

Why: The data bus carries data in both directions, so it is not the bus that carries addresses in one direction only from the CPU to main memory; no creditworthy point.

No marks0/1

B Control bus

Why: The control bus carries control signals in both directions, not addresses in one direction only; this is the common control/address bus confusion, so no mark.

3Short recall1 markPrimary Memory Swap Remove

Computers use RAM to store the data and instructions that are in use.

Name the term used to describe memory that loses its contents when the power is switched off.

[1 mark]
Mark scheme

Award one mark for:

  • Volatile (1)

Allow volatile memory / it is volatile.

Do not accept non-volatile, ROM, RAM or temporary/short term memory on their own, as these are not the term asked for.

Example answers and how they were marked
Full marks1/1

Volatile

Why: Correct term for memory that loses its contents when the power is switched off (1).

No marks0/1

Temporary memory

Why: Describes what such memory does but is not the term asked for; 'temporary memory' is on the Do not accept line, so no mark.

No marks0/1

Non-volatile

Why: Non-volatile memory keeps its contents when the power is switched off, the opposite of what the question describes; it is explicitly not accepted.

4Explain2 marksFetch Decode Execute Cycle Swap Remove

The control unit is part of the CPU.

Explain the role of the control unit in the fetch-decode-execute cycle.

[2 marks]
Mark scheme

Award up to two marks for a linked explanation such as:

  • Decodes/interprets/translates the instruction (1) to work out what the instruction is/what operation is required (1)
  • Sends control signals to the other components (1) so that the correct component carries out the instruction (1), e.g. the ALU/main memory
  • Controls the fetch of the instruction from main memory (1) because the address of the next instruction is sent via the address bus (1)
  • Controls the fetch of the next instruction from main memory (1) by sending a control signal/read signal to main memory (1)

For both marks, the expansion must follow/associate with the statement.

For the decode point, 'decodes the instruction' alone gains 1 mark; a second mark needs the purpose of decoding, i.e. working out what the instruction is/what operation is required.

Do not accept 'it controls the CPU' on its own, without naming a task in the cycle.

Do not accept 'it fetches the instruction from memory' on its own, as this describes the fetch step rather than the control unit's role; credit only if linked to controlling/signalling the fetch.

Do not accept carrying out arithmetic/logical operations, as these are carried out by the ALU, or holding the address of the next instruction, as this is the program counter.

Do not accept storing the instruction in a register (e.g. MAR/MDR), as this is not the role of the control unit.

Example answers and how they were marked
Full marks2/2

The control unit decodes each instruction, working out what it means, so that the CPU knows which component should carry it out.

Why: Linked point (1) and reason (1): decodes/interprets the instruction, and works out what it is/what operation is required.

Some marks1/2

It decodes the instruction that has been fetched from main memory.

Why: Decode point only (1); it does not explain the purpose of decoding, i.e. working out what the instruction is/what operation is required.

No marks0/2

It adds the two numbers together and stores the result in a register.

Why: Misconception: arithmetic is carried out by the ALU, which the mark scheme's Do not accept line covers.

Questions by topic

2.1 Binary

Build a paper on this topic 58
Adding Binary Numbers 6 questions Binary and Hexadecimal Basics 10 questions Binary Shifts 6 questions Binary to Denary Conversion 6 questions Binary to Hexadecimal Conversion 6 questions Denary to Binary Conversion 6 questions Denary to Hexadecimal Conversion 6 questions Denary to Negative Binary Conversion 6 questions Hexadecimal to Binary Conversion 6 questions

2.2 Data representation

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Character Sets 18 questions Images 19 questions Sound 19 questions

2.3 Data storage and compression

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Compression 18 questions Units & Conversion 6 questions

3.1 Hardware

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Embedded Systems 17 questions Fetch Decode Execute Cycle 15 questions Primary Memory 15 questions Secondary Memory 15 questions Stored Program Computers 15 questions

3.2 Software

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File Management 18 questions Memory Management 16 questions Peripheral Management 11 questions Process Management 12 questions Purpose & Function of Operating Systems 17 questions Software Basics 13 questions User Management 18 questions Utility Software 19 questions

3.3 Programming languages

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Low and High Level Languages 19 questions Translators 18 questions

4.1 Networks

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Addressing 16 questions LANs & WANs 16 questions Network Speed 5 questions Packet Switching 16 questions Protocols & Layers 17 questions The Internet 16 questions Topologies 17 questions Wired Connections 17 questions Wireless Connections 18 questions

4.2 Network security

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Network Security Risks 18 questions Preventing Network Security Risks 18 questions

5.1 Environmental

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E-waste 17 questions Manufacturing Technology 19 questions

5.2 Ethical and legal

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Data Protection Act 17 questions Impact of AI 18 questions Intellectual Property 18 questions Software Licences 12 questions

5.3 Cybersecurity

Malware 8 questions

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