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Edexcel GCSE Computer Science (1CP2) Exam Questions

Build a practice paper from 693 exam-style questions, each with its mark scheme and example answers. Print it, or answer it on paper and then open the mark schemes. Or browse the questions by topic.

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3 questions · 5 marks

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1Multiple choice1 markPrimary Memory Swap Remove

A computer is running an application. The application's data and instructions are transferred from secondary storage into RAM before the CPU processes them.

Identify the reason for this transfer.

[1 mark]
  • ARAM is non-volatile
  • BRAM is faster to access than secondary storage
  • CRAM has a larger capacity than secondary storage
  • DRAM is cheaper than secondary storage
Mark scheme
  • B RAM is faster to access than secondary storage (1)
  • The only correct answer is B. The correct answer is RAM is faster to access than secondary storage.
  • A is not correct because RAM is volatile
  • C is not correct because RAM has a smaller capacity than secondary storage
  • D is not correct because RAM is more expensive than secondary storage
Example answers and how they were marked
Full marks1/1

B RAM is faster to access than secondary storage

Why: Selects the correct option: RAM is faster to access than secondary storage, so data and instructions can reach the CPU quickly (1).

No marks0/1

A RAM is non-volatile

Why: Near miss: RAM is volatile; this does not explain the transfer into RAM.

No marks0/1

C RAM has a larger capacity than secondary storage

Why: Misconception: assumes primary memory has a larger capacity, but RAM has a smaller capacity than secondary storage.

2Short recall2 marksStored Program Computers Swap Remove

The central processing unit (CPU) contains an arithmetic logic unit (ALU).

State two types of operation carried out by the ALU.

[2 marks]
Mark scheme

Award one mark for any of the following up to a maximum of two marks:

  • An arithmetic operation, e.g. addition/subtraction/multiplication/division (1)
  • A logical operation, e.g. comparing two values (is A > B?) / using AND, OR, NOT (1)

Do not accept decoding instructions, fetching instructions or controlling the timing of the CPU, as these are carried out by the control unit.

Example answers and how they were marked
Full marks2/2

It carries out arithmetic operations such as addition and subtraction, and logical operations such as comparing two values to see if one is greater than the other.

Why: Arithmetic operation (1) and logical operation (1).

Some marks1/2

It adds numbers together and works out the result.

Why: Arithmetic operation, addition (1). No logical operation.

No marks0/2

It decodes the instructions that have been fetched from main memory.

Why: Decoding and fetching are the control unit's role; the mark scheme's do-not-accept line covers this.

3Describe2 marksFetch Decode Execute Cycle Swap Remove

The control unit is one component of the CPU.

Describe the role of the control unit in the fetch-decode-execute cycle.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • Decodes instructions (1) to determine what action/operation is required (1)
  • Sends control signals (1) along the control bus to coordinate/control the actions of other components (1)
  • Controls the fetch stage (1) by causing the next instruction to be fetched from main memory/RAM (1)
  • Controls the execute stage (1) by telling the ALU/other components when to carry out the required operation (1)

Do not accept responses relating to how the control unit affects performance, such as increasing clock speed.

Do not accept responses that describe the role of the ALU, registers or clock instead of the control unit.

Do not accept responses about the ALU performing calculations unless the control unit controlling the ALU is also stated.

Example answers and how they were marked
Full marks2/2

The control unit decodes instructions to determine what action is required.

Why: Linked point (1) and development (1): decodes instructions and determines the required action.

Some marks1/2

The control unit controls the fetch stage of the cycle.

Why: Point only (1): controls the fetch stage, but no linked development.

No marks0/2

The control unit carries out arithmetic and logical operations on data.

Why: No creditworthy point: describes the role of the ALU, which the mark scheme rejects.

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