Edexcel GCSE Computer Science (1CP2) Exam Questions

• B RAM is faster to access than secondary storage (1)
• The only correct answer is B. The correct answer is RAM is faster to access than secondary storage.
• A is not correct because RAM is volatile
• C is not correct because RAM has a smaller capacity than secondary storage
• D is not correct because RAM is more expensive than secondary storage

Award one mark for any of the following up to a maximum of two marks:

• (Storage that is) non-volatile / keeps its data when the power is turned off (1)
• (Storage that is) used to store programs and data/files (for later use) (1)
• (Storage that is) not directly accessible by the CPU / not directly accessed by the CPU (1)

Allow both the non-volatile point and the stores programs and data point from one sentence if each idea is clearly stated, e.g. 'non-volatile storage that holds programs and data'.

Allow accessed via the CPU / must be copied into RAM before the CPU can use it for the third point.

Do not accept volatile / loses its data when the power is turned off.

Do not accept a description of primary storage, such as RAM or ROM.

Do not accept capacity.

Do not accept an example device on its own (e.g. hard disk drive).

Award up to two marks for a linked description such as:

• During fetch, the program counter holds the address of the next instruction (1) which is used to fetch that instruction from main memory/RAM (1)
• During fetch, the instruction is held in a register/current instruction register (1) so the control unit can decode it (1)
• During decode, the control unit decodes the instruction held in a register/current instruction register (1) to identify the operation/operand to be carried out (1)
• During execute, a register/accumulator holds the data being operated on (1) and stores the result from the ALU (1)
• During execute, a register holds the result of an ALU operation (1) before it is written back to main memory/RAM (1)

Accept other correctly named registers (program counter/PC, current instruction register/CIR, memory address register/MAR, memory data register/MDR, accumulator) where their role is linked to a stage of the fetch-decode-execute cycle.

Do not accept 'registers store data' or 'registers hold data' on its own, without a link to fetch, decode or execute (or to the CPU currently processing it).

Do not accept responses that state registers are in main memory or that registers store data/instructions permanently.

Do not accept 'registers are a type of memory' or 'registers store the program' as they do not describe a role in the fetch-decode-execute cycle.