Menu

Edexcel GCSE Computer Science (1CP2) Exam Questions

Build a practice paper from 693 exam-style questions, each with its mark scheme and example answers. Print it, or answer it on paper and then open the mark schemes. Or browse the questions by topic.

Build a paper

Topics (none ticked: all of them)
Question types (none ticked: all of them)

Practice paper

4 questions · 7 marks

Pick again
Print
1Multiple choice1 markPrimary Memory Swap Remove

A computer is running an application. The application's data and instructions are transferred from secondary storage into RAM before the CPU processes them.

Identify the reason for this transfer.

[1 mark]
  • ARAM is non-volatile
  • BRAM is faster to access than secondary storage
  • CRAM has a larger capacity than secondary storage
  • DRAM is cheaper than secondary storage
Mark scheme
  • B RAM is faster to access than secondary storage (1)
  • The only correct answer is B. The correct answer is RAM is faster to access than secondary storage.
  • A is not correct because RAM is volatile
  • C is not correct because RAM has a smaller capacity than secondary storage
  • D is not correct because RAM is more expensive than secondary storage
Example answers and how they were marked
Full marks1/1

B RAM is faster to access than secondary storage

Why: Selects the correct option: RAM is faster to access than secondary storage, so data and instructions can reach the CPU quickly (1).

No marks0/1

A RAM is non-volatile

Why: Near miss: RAM is volatile; this does not explain the transfer into RAM.

No marks0/1

C RAM has a larger capacity than secondary storage

Why: Misconception: assumes primary memory has a larger capacity, but RAM has a smaller capacity than secondary storage.

2Describe2 marksEmbedded Systems Swap Remove

A drone is controlled by an embedded system.

Describe the purpose of the embedded system in the drone.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • It controls the motors/rotors (1) so that the drone can take off, hover, turn and land (1)
  • It keeps the drone stable/level automatically (1) by taking readings from a sensor (accelerometer/gyroscope/GPS) (1)
  • It receives signals from the remote control (1) and changes the speed of the motors to steer the drone (1)
  • It monitors the battery level (1) and brings the drone back to the ground before the battery runs out (1)

The development must relate to the function given in the point.

Accept a named function that the embedded system controls, e.g. 'it keeps the drone level', as the first mark (1).

Award the second mark only when the development gives a specific outcome or detail of that function, e.g. 'so that the drone can take off, hover, turn and land' or 'by changing the motor speeds to keep it level'.

Do not award the second mark for a generic outcome such as 'so it works', 'so it can fly' or 'so the drone moves'.

A bare 'it controls the motors so it can fly' therefore earns the first mark only.

Allow any other specific function of a drone that is carried out by the embedded system.

Do not accept 'it flies the drone' / 'it is the drone's brain' / 'it makes the drone work' without a named function being controlled.

Do not accept answers that describe the user or the remote control flying the drone with no function carried out by the embedded system.

Example answers and how they were marked
Full marks2/2

It keeps the drone level while it is in the air by reading the accelerometer and changing the speed of the motors.

Why: Named function of the embedded system, keeping the drone level (1), developed with the sensor reading and motor speed changes that achieve it (1).

Some marks1/2

It controls the motors of the drone.

Why: First mark only (1) for naming a function the embedded system controls, with no linked outcome or detail to earn the second mark.

No marks0/2

It is the brain of the drone and makes the drone work.

Why: Vague phrase with no named function being controlled, which the mark scheme's 'Do not accept' line rules out.

3Describe2 marksStored Program Computers Swap Remove

A computer is based on the von Neumann stored program concept.

Describe how the CPU uses main memory (RAM) during the fetch-decode-execute cycle.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • The program's instructions (and the data it uses) are held in main memory/RAM (1) so the CPU fetches both the instructions and the data from that one memory (1)
  • The CPU fetches the next instruction from main memory/RAM (1) using the address of the memory location that holds it (1)
  • The CPU reads/fetches data from main memory/RAM (1) when an instruction needs it and writes the result back to main memory/RAM (1)
  • The program's instructions are held in main memory/RAM while the program runs (1) and the CPU fetches them one at a time/one after another to be decoded and executed (1)

Allow 'memory' for main memory/RAM.

Allow 'gets' for fetches/reads.

For both marks, the development must say what the CPU does with the contents of main memory (fetches/reads/writes), not just that main memory is used.

Do not accept answers about the program being stored in secondary storage, such as on a hard drive, or about it being loaded from there.

Do not accept benefits such as the computer running faster or being easier for the user.

Do not accept naming CPU components (control unit, arithmetic logic unit, registers) or buses on their own, without saying what is stored or fetched.

Do not accept 'the computer stores data' on its own, without a link to the instructions of a program.

Example answers and how they were marked
Full marks2/2

The program's instructions and the data it uses are both held in the same main memory (RAM), so the CPU can fetch the instructions and the data it needs from that one memory.

Why: Linked point (1) that instructions and data are stored together in main memory, with the development (1) that the CPU fetches both from the same memory.

Some marks1/2

The CPU fetches the instructions from main memory so that they are processed more quickly.

Why: The first point earns (1) for the CPU fetching instructions from main memory. The second statement is a benefit (speed), which the 'Do not accept benefits' line rules out, so it earns nothing.

No marks0/2

The control unit decodes each instruction and the ALU carries out the calculations.

Why: Both statements name CPU components without saying what is stored, fetched or written, which the mark scheme tells examiners not to accept, so neither earns a mark.

4Explain2 marksFetch Decode Execute Cycle Swap Remove

The CPU carries out the fetch-decode-execute cycle.

Explain one reason why the address bus is used in the fetch stage of the fetch-decode-execute cycle.

[2 marks]
Mark scheme

Award up to two marks for a linked explanation such as:

  • The address bus carries the address of the next instruction (1) so the CPU can locate/fetch it from main memory/RAM (1)
  • The address bus carries the address of the memory location to be read (1) so the instruction/data stored there can be located/accessed (1)
  • The CPU needs to know where the next instruction is stored (1) so the address bus sends the address to main memory/RAM (1)

For both marks, the expansion must follow/associate with the statement.

Allow 'from the program counter/PC' as part of the point for one mark, e.g. the address bus carries the address from the program counter (1), but the second mark needs the destination or purpose (e.g. to locate/fetch the instruction in main memory/RAM).

Do not award the second mark for naming the program counter/PC alone.

Do not accept answers that say the address bus carries data/instructions from main memory to the CPU, as these travel on the data bus.

Do not accept answers that say the address bus stores the address.

Do not allow an answer that only restates that the address bus carries addresses without saying which address or why it is needed.

Example answers and how they were marked
Full marks2/2

The address bus carries the address of the next instruction from the program counter to main memory, so that the CPU can locate the instruction that is to be fetched.

Why: Linked point (1) and reason (1).

Some marks1/2

The address bus carries the address of the next instruction from the program counter.

Why: Point only (1); the second mark is not awarded because the destination/purpose of locating or fetching the instruction is missing.

No marks0/2

It carries the instruction from main memory back to the CPU so that it can be decoded.

Why: Misconception: instructions travel on the data bus, which the mark scheme's Do not accept line covers.

Questions by topic

More ways to revise Edexcel GCSE Computer Science (1CP2)

Teachers: build a paper, print it with the mark schemes at the end, and sign your school up to set your classes activities on every topic.

Fetch Decode Explain isn't affiliated with or endorsed by Pearson Edexcel.