Menu

Edexcel GCSE Computer Science (1CP2) Exam Questions

Build a practice paper from 693 exam-style questions, each with its mark scheme and example answers. Print it, or answer it on paper and then open the mark schemes. Or browse the questions by topic.

Build a paper

Topics (none ticked: all of them)
Question types (none ticked: all of them)

Practice paper

5 questions · 13 marks

Pick again
Print
1Multiple choice1 markPrimary Memory Swap Remove

RAM is the main memory of a computer.

Identify the effect on the contents of RAM when the computer is switched off.

[1 mark]
  • AThey are lost
  • BThey are stored permanently
  • CThey are saved to secondary storage
  • DThey are written to ROM
Mark scheme
  • A They are lost (1)
  • The only correct answer is A. The correct answer is They are lost
  • B is not correct because RAM is volatile and its contents are lost when the power is switched off, so they are not stored permanently
  • C is not correct because RAM is volatile and its contents are lost when the power is switched off, so they are not saved to secondary storage
  • D is not correct because ROM is read-only memory that holds the start-up instructions, so the contents of RAM are not written to it
Example answers and how they were marked
Full marks1/1

A They are lost

Why: Selected the correct option. RAM is volatile, so its contents are lost when the power is switched off (1).

No marks0/1

C They are saved to secondary storage

Why: Near miss: thinks RAM contents are automatically saved, but RAM is volatile and its contents are not saved to secondary storage (0).

No marks0/1

B They are stored permanently

Why: Misconception: thinks RAM is non-volatile and keeps data permanently, but RAM is volatile and loses its contents when the power is switched off (0).

2Short recall2 marksEmbedded Systems Swap Remove

An embedded system is a computer system built into another device to perform a specific function.

Give two examples of devices that contain an embedded system.

[2 marks]
Mark scheme

Award one mark for any of the following up to a maximum of two marks:

  • Microwave (oven) (1)
  • Washing machine (1)
  • Dishwasher (1)
  • Digital camera (1)
  • Satellite navigation/satnav system (1)
  • Traffic light(s) (1)
  • Central heating controller/thermostat (1)
  • Digital watch/fitness tracker (1)
  • Vending machine (1)
  • Car (as it contains embedded systems) (1)

Allow any other device that contains an embedded system.

Do not accept general purpose devices such as a laptop, desktop computer, tablet or smartphone (these can run many different programs).

Example answers and how they were marked
Full marks2/2

A microwave oven and a washing machine.

Why: Two creditworthy devices, a microwave oven (1) and a washing machine (1).

Some marks1/2

A dishwasher and a laptop computer.

Why: Dishwasher credited (1); laptop is a general purpose device, so not accepted.

No marks0/2

A desktop computer and a smartphone.

Why: Both are general purpose devices, so neither earns a mark.

3Explain2 marksEmbedded Systems Swap Remove

An engine control unit (ECU) in a car is an embedded system.

Explain one benefit of using an embedded system for the engine control unit instead of a general purpose computer.

[2 marks]
Mark scheme

Award up to two marks for a linked explanation such as:

  • (The ECU) is more reliable/less likely to crash (1) because it only runs the one program/has a single purpose (1)
  • (The ECU) cannot be affected by other software/viruses (1) because it cannot run other software/it can only run the program it was made for (1)
  • (The ECU) is cheaper (1) because it has limited processing resources/less memory/simple components (1)
  • (The ECU) uses less power (1) because it has limited processing resources/a simpler processor (1)
  • (The ECU) is smaller (1) because it has fewer components/less memory than a general purpose computer (1)

For both marks, the expansion must follow/associate with the statement.

A suitable benefit stated on its own earns one mark.

Do not accept a description or a location given as the reason, e.g. 'because it is part of the car', 'because it is inside the engine', 'because it is embedded'.

Do not accept a description of an embedded system on its own as the benefit, e.g. 'it does one specific job' or 'it is part of the car'.

Do not accept 'it is faster'/'it has a more powerful processor' as embedded systems have limited processing resources.

Example answers and how they were marked
Full marks2/2

It is more reliable than a general purpose computer because it only runs the one program so it will not crash and stop the engine working.

Why: Benefit stated (1) with a linked reason (1); the reason shows why only running one program makes it reliable.

Some marks1/2

It is more reliable because it is part of the car's engine.

Why: Only the benefit earns a mark (1); being part of the car is a location, not a linked reason why it is reliable.

No marks0/2

It is faster than a general purpose computer because it is embedded in the engine.

Why: Misconception that an embedded system is faster; embedded systems have limited processing resources, so neither point nor reason is creditworthy.

4Explain2 marksPrimary Memory Swap Remove

RAM is used to store data while a computer is running.

Explain one reason why the data in RAM is lost when a computer is switched off.

[2 marks]
Mark scheme

Award up to two marks for a linked explanation such as:

  • RAM is volatile (memory) (1) because it needs a constant/continuous power supply to hold/store the data it contains (1)
  • Data is held in RAM as electrical states/charges (1) so when the power supply is removed these states cannot be kept/refreshed and the data is lost (1)
  • RAM is used as short-term storage for the data and instructions currently in use (1) because it can only hold them while the computer has power (1)

For both marks, the expansion must follow/associate with the statement and must link the loss of the data to the power supply being removed.

Accept 'RAM is volatile' on its own for the first mark; the second mark is only awarded for a linked reason about the power supply.

Do not accept 'RAM is temporary/short-term memory' or 'RAM is cleared when the computer is switched off' on its own for both marks, as neither gives a reason.

Do not accept answers that say the data is deleted/cleared/erased by the computer or the operating system, or that the data is saved/moved to secondary storage, without saying why the data cannot be kept (e.g. because RAM needs power/is volatile).

Example answers and how they were marked
Full marks2/2

RAM is volatile memory, which means it needs a constant power supply to keep the data it is holding. When the power is switched off, the data is lost.

Why: Linked point (1) for 'RAM is volatile memory' and reason (1) for needing a constant power supply to hold the data.

Some marks1/2

The data in RAM is lost because RAM is volatile memory.

Why: Point (1) for 'RAM is volatile' but no linked reason about the power supply, and the mark scheme states that 'RAM is volatile' alone earns only the first mark.

No marks0/2

The data is deleted from RAM by the operating system when the computer is shut down so that the memory is free for next time.

Why: No creditworthy point: the answer says the data is deleted without saying why it cannot be kept, which the mark scheme's 'Do not accept' line rules out.

5Discuss6 marksStored Program Computers Swap Remove

A college is buying new computers for its computer science classroom. A technician explains that the CPU uses three buses to communicate with main memory and other components.

Discuss the role of the address bus, the data bus and the control bus in the fetch-decode-execute cycle.

Your answer should include:

  • what each bus carries
  • the direction in which each bus carries it
  • the role of the buses in the fetch-decode-execute cycle.
[6 marks]
Mark scheme

Indicative content

What each bus carries

  • The address bus carries the address of a memory location that the CPU wants to read from or write to.
  • The data bus carries data and instructions between the CPU and main memory, and between the CPU and other components such as the input and output controllers.
  • The control bus carries control signals, such as read and write, that coordinate the activities of the computer.
  • The clock is a separate component that sends regular pulses, and the control bus carries the signals that keep the other components in time with those pulses.

Direction

  • The address bus is one-way, carrying addresses from the CPU to main memory.
  • The data bus is two-way, so data and instructions can travel both to and from the CPU.
  • The control bus carries control signals from the control unit to the other components, and it is not the clock signal itself.
  • The number of bits in the address bus determines how many memory locations can be addressed, and the number of bits in the data bus determines how much can be transferred at one time.

The role of the buses in the fetch-decode-execute cycle

  • Fetch: the address of the next instruction, held in a register in the CPU, is placed on the address bus so that main memory knows which location to read.
  • Fetch: the control unit sends a read signal on the control bus to main memory.
  • Fetch: the instruction held in that location is returned to the CPU on the data bus.
  • Decode: the control unit decodes the instruction and sends control signals on the control bus to set up the other components, for example telling the ALU which operation to carry out.
  • Execute: the address of any data needed is placed on the address bus, a read or write signal is sent on the control bus, and the data itself travels between the CPU and main memory on the data bus.
  • The cycle repeats, with each step taking place in time with a pulse from the clock.

Level 3 responses must cover all three buses and link them to the fetch-decode-execute cycle, including the fetch stage and at least one of the decode and execute stages. Answers that describe each bus correctly but link none of them to a stage of the cycle are limited to Level 1.

Do not accept 'the address bus carries data', 'the data bus carries addresses', 'the data bus carries instructions only during the fetch stage', 'the control bus carries the clock signal' or 'the control bus is the clock'; the clock is a separate component whose pulses the control signals coordinate with.

Levels

  • Level 0 (0 marks): No rewardable content.
  • Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
  • Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
  • Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)
Example answers and how they were marked
Full marks6/6

At the start of the fetch stage the address of the next instruction, which is held in a register, is placed on the address bus, which is one-way, so that main memory knows which location to read. The control unit sends a read signal on the control bus, and the instruction held at that address is returned to the CPU on the data bus, which is two-way. In the decode stage the control unit works out what the instruction means and sends control signals on the control bus to set up the other components, for example telling the ALU which operation to carry out. In the execute stage, if the instruction needs data from memory, the address of that data is placed on the address bus, a read or write signal is sent on the control bus and the data itself travels on the data bus. Every step happens on a pulse from the clock, which is a separate component, and the control bus carries the signals that keep the components in time with it. The widths of the buses matter too: more address bits mean more memory locations can be addressed and more data bits mean more can be moved at once.

Why: Level 3 (6 marks): all three buses are covered, with what each carries and its direction, and each is linked to the fetch, decode and execute stages, plus the role of the clock and the effect of bus widths.

Some marks2/6

The address bus carries addresses from the CPU to the memory and it is one-way. The data bus carries data and it is two-way. The control bus carries control signals. During the fetch stage the CPU fetches the instruction from memory using these buses.

Why: Level 1 (2 marks): each bus is named with a basic correct statement (address bus carries addresses one-way, data bus is two-way, control bus carries control signals), but no bus is linked to a stage of the cycle, so the guidance line limits this to Level 1; the general mention of the fetch stage is not tied to any bus.

No marks0/6

The address bus carries the data to the CPU. The data bus carries the addresses to the memory. The control bus is the clock that makes the CPU run faster.

Why: Level 0 (0 marks): the address bus and data bus roles are swapped, which the scheme says not to accept, and the control bus is wrongly described as the clock, which is also not accepted, so there is no rewardable content.

Questions by topic

More ways to revise Edexcel GCSE Computer Science (1CP2)

Teachers: build a paper, print it with the mark schemes at the end, and sign your school up to set your classes activities on every topic.

Fetch Decode Explain isn't affiliated with or endorsed by Pearson Edexcel.