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Edexcel GCSE Computer Science (1CP2) Exam Questions

Build a practice paper from 693 exam-style questions, each with its mark scheme and example answers. Print it, or answer it on paper and then open the mark schemes. Or browse the questions by topic.

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3 questions · 7 marks

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1Multiple choice1 markPrimary Memory Swap Remove

RAM is the main memory of a computer.

Identify the effect on the contents of RAM when the computer is switched off.

[1 mark]
  • AThey are lost
  • BThey are stored permanently
  • CThey are saved to secondary storage
  • DThey are written to ROM
Mark scheme
  • A They are lost (1)
  • The only correct answer is A. The correct answer is They are lost
  • B is not correct because RAM is volatile and its contents are lost when the power is switched off, so they are not stored permanently
  • C is not correct because RAM is volatile and its contents are lost when the power is switched off, so they are not saved to secondary storage
  • D is not correct because ROM is read-only memory that holds the start-up instructions, so the contents of RAM are not written to it
Example answers and how they were marked
Full marks1/1

A They are lost

Why: Selected the correct option. RAM is volatile, so its contents are lost when the power is switched off (1).

No marks0/1

C They are saved to secondary storage

Why: Near miss: thinks RAM contents are automatically saved, but RAM is volatile and its contents are not saved to secondary storage (0).

No marks0/1

B They are stored permanently

Why: Misconception: thinks RAM is non-volatile and keeps data permanently, but RAM is volatile and loses its contents when the power is switched off (0).

2Short recall3 marksStored Program Computers Swap Remove

The CPU contains several components.

Name three components of the CPU.

[3 marks]
Mark scheme

Award one mark for any of the following up to a maximum of three marks:

  • Control unit / CU (1)
  • Arithmetic logic unit / ALU (1)
  • Register(s) (1)
  • Clock (1)

Do not accept main memory / RAM.

Do not accept cache.

Marks can be awarded in any order.

Example answers and how they were marked
Full marks3/3

Control unit, arithmetic logic unit and registers.

Why: Names three creditworthy CPU components (control unit, ALU, registers), one mark each.

Some marks2/3

Control unit, clock and main memory.

Why: Control unit (1) and clock (1) are creditworthy; main memory is not a component of the CPU, a common misconception seen in the June 2023 question.

No marks0/3

Main memory, RAM and cache.

Why: None are CPU components named in the specification; candidates often confuse main memory with CPU components.

3Short recall3 marksFetch Decode Execute Cycle Swap Remove

The fetch-decode-execute cycle is used by the CPU.

State three things that happen during the fetch stage.

[3 marks]
Mark scheme

Award one mark for any of the following up to a maximum of three marks:

  • The address (of the next instruction) is sent from the CPU to main memory / placed on the address bus (1)
  • The (next) instruction is fetched/read from main memory (RAM) (1)
  • The instruction is brought/copied into the CPU / received into the MDR (1)
  • The program counter (PC) is incremented/updated to hold the address of the next instruction (1)

Allow 'the PC/MAR is placed on the address bus' for the address being sent to main memory.

Allow 'the MDR receives the instruction' for the instruction being brought into the CPU.

Do not award a second mark for the instruction being fetched from main memory and the instruction being brought into the CPU; these are the same point.

Do not award 'the instruction is transferred along the data bus' on its own; this is the same point as the instruction being fetched from main memory.

Do not accept answers about decoding the instruction, e.g. 'the instruction is fetched from RAM and decoded', as decoding happens in the decode stage.

Do not accept answers about the execute stage, e.g. 'the ALU carries out the calculation' or 'the result of a calculation is stored in a register', as these happen in the execute stage.

Example answers and how they were marked
Full marks3/3

The address of the next instruction is sent to main memory, the instruction is fetched from RAM, and the program counter is incremented.

Why: Address sent to main memory (1), instruction fetched from RAM (1) and program counter incremented (1).

Some marks1/3

The instruction is fetched from main memory and then decoded.

Why: Fetching the instruction from main memory (1); decoding happens in the decode stage, so it is not creditworthy in the fetch stage.

No marks0/3

The ALU carries out the calculation and the result is stored in a register.

Why: The ALU carrying out a calculation and storing a result happen in the execute stage, not the fetch stage, so no point is creditworthy.

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