Edexcel GCSE Computer Science (1CP2) Exam Questions

• C Main memory (RAM) (1)
• The only correct answer is C. The correct answer is main memory (RAM); accept 'main memory', 'RAM' or 'random access memory'.
• A is not correct because the arithmetic logic unit performs arithmetic and logical operations
• B is not correct because the clock sends regular pulses to synchronise the components of the CPU
• D is not correct because the program counter holds the address of the next instruction, not the instructions and data

• A Decodes instructions (1)
• The only correct answer is A. The correct answer is Decodes instructions.
• B is not correct because the arithmetic logic unit performs arithmetic operations
• C is not correct because main memory stores data and instructions
• D is not correct because registers temporarily store data being processed

Award up to two marks for a linked explanation such as:

• The CPU can only fetch/read instructions from main memory/RAM (1) so the instructions of a running program must be copied/loaded into RAM before they can be executed (1)
• RAM is faster to access than secondary storage (1) so the instructions can be fetched quickly enough for the CPU to execute them (1)
• The CPU needs the instructions in RAM to fetch and execute them (1) because the fetch-decode-execute cycle reads each instruction from main memory/RAM (1)
• The address of the next instruction is sent to RAM on the address bus (1) so the instruction can be transferred to the CPU/registers for decoding/execution (1)

For both marks, the expansion must follow/associate with the statement.

Allow the point and reason in either order if they are linked.

Do not accept answers that only say the CPU needs instructions, or that RAM is faster, without linking this to fetching/executing the instructions.

Do not accept answers that only say RAM holds data and instructions without linking this to the fetch-decode-execute cycle.

Do not accept 'RAM is permanent/non-volatile storage, so the instructions are kept safe' - RAM is volatile.

The response does not need to name the address bus or the fetch stage for full marks; a linked reason that explains why instructions must be in RAM (for example, the CPU can only fetch from RAM, or RAM is faster than secondary storage) is enough.

Indicative content

Fetching and decoding an instruction

• The register that holds the address of the next instruction (the program counter) contains the address of the instruction to be fetched.
• This address is sent to main memory (RAM) and the instruction is copied from main memory into a register inside the CPU.
• The program counter is updated so that it holds the address of the next instruction in the program.
• The control unit decodes the instruction that has been fetched, working out which operation is required and which data or registers are needed.
• The control unit sends control signals to coordinate the other components as the instruction is carried out.
• The control unit decides what happens next, for example after a comparison it decides whether the next instruction is the following one or a jump.

The arithmetic logic unit (ALU) executes an instruction

• The control unit directs the arithmetic logic unit (ALU) to carry out the operation.
• The ALU performs arithmetic operations such as addition, subtraction, multiplication and division, for example adding two values in a program written by the class.
• The ALU performs logical operations such as comparing two values to see if they are equal or whether one is greater than the other.
• The result of the operation carried out by the ALU is passed back and stored in a register.
• The ALU operates on data that has been fetched from main memory; it does not fetch the instruction and it does not decide which instruction is next.

Registers

• Registers are small, very fast memory locations inside the CPU.
• They hold the data, addresses and results that the CPU is working on during the cycle.
• Registers are used in every stage of the cycle, not only when the ALU produces a result.
• Because registers are inside the CPU they can be read and written much faster than main memory during the cycle.

Levels

• Level 0 (0 marks): No rewardable content.
• Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
• Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
• Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)
• A Level 3 answer must link the roles of all three components to the fetch, decode and execute stages. An answer that links only one component to a stage, with the other points listed separately, is Level 1 (1–2 marks); an answer that links two of the components to stages is Level 2 (3–4 marks). A point repeated under more than one heading is credited once only.
• Accept 'the program counter', 'the address register' or 'a register holding the address of the next instruction' as the register that holds the address of the next instruction. Do not accept 'the control unit performs the calculations', 'the ALU controls the timing of the CPU' / 'the ALU sends the clock signal' or 'registers are in main memory (RAM)'.