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Edexcel GCSE Computer Science (1CP2) Exam Questions

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3 questions · 6 marks

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1Multiple choice1 markFetch Decode Execute Cycle Swap Remove

Identify the component that stores instructions and data during the fetch-decode-execute cycle.

[1 mark]
  • AArithmetic logic unit
  • BClock
  • CMain memory (RAM)
  • DProgram counter
Mark scheme
  • C Main memory (RAM) (1)
  • The only correct answer is C. The correct answer is main memory (RAM); accept 'main memory', 'RAM' or 'random access memory'.
  • A is not correct because the arithmetic logic unit performs arithmetic and logical operations
  • B is not correct because the clock sends regular pulses to synchronise the components of the CPU
  • D is not correct because the program counter holds the address of the next instruction, not the instructions and data
Example answers and how they were marked
Full marks1/1

C Main memory (RAM)

Why: Correct option: main memory (RAM) stores instructions and data during the fetch-decode-execute cycle (1).

No marks0/1

D Program counter

Why: Near-miss distractor: the program counter holds the address of the next instruction, not the instructions and data (0).

No marks0/1

A Arithmetic logic unit

Why: Misconception: the ALU performs arithmetic and logical operations, so it does not store instructions and data (0).

2Short recall3 marksStored Program Computers Swap Remove

The CPU contains several components.

Name three components of the CPU.

[3 marks]
Mark scheme

Award one mark for any of the following up to a maximum of three marks:

  • Control unit / CU (1)
  • Arithmetic logic unit / ALU (1)
  • Register(s) (1)
  • Clock (1)

Do not accept main memory / RAM.

Do not accept cache.

Marks can be awarded in any order.

Example answers and how they were marked
Full marks3/3

Control unit, arithmetic logic unit and registers.

Why: Names three creditworthy CPU components (control unit, ALU, registers), one mark each.

Some marks2/3

Control unit, clock and main memory.

Why: Control unit (1) and clock (1) are creditworthy; main memory is not a component of the CPU, a common misconception seen in the June 2023 question.

No marks0/3

Main memory, RAM and cache.

Why: None are CPU components named in the specification; candidates often confuse main memory with CPU components.

3Explain2 marksFetch Decode Execute Cycle Swap Remove

The control unit is part of the CPU.

Explain the role of the control unit in the fetch-decode-execute cycle.

[2 marks]
Mark scheme

Award up to two marks for a linked explanation such as:

  • Decodes/interprets/translates the instruction (1) to work out what the instruction is/what operation is required (1)
  • Sends control signals to the other components (1) so that the correct component carries out the instruction (1), e.g. the ALU/main memory
  • Controls the fetch of the instruction from main memory (1) because the address of the next instruction is sent via the address bus (1)
  • Controls the fetch of the next instruction from main memory (1) by sending a control signal/read signal to main memory (1)

For both marks, the expansion must follow/associate with the statement.

For the decode point, 'decodes the instruction' alone gains 1 mark; a second mark needs the purpose of decoding, i.e. working out what the instruction is/what operation is required.

Do not accept 'it controls the CPU' on its own, without naming a task in the cycle.

Do not accept 'it fetches the instruction from memory' on its own, as this describes the fetch step rather than the control unit's role; credit only if linked to controlling/signalling the fetch.

Do not accept carrying out arithmetic/logical operations, as these are carried out by the ALU, or holding the address of the next instruction, as this is the program counter.

Do not accept storing the instruction in a register (e.g. MAR/MDR), as this is not the role of the control unit.

Example answers and how they were marked
Full marks2/2

The control unit decodes each instruction, working out what it means, so that the CPU knows which component should carry it out.

Why: Linked point (1) and reason (1): decodes/interprets the instruction, and works out what it is/what operation is required.

Some marks1/2

It decodes the instruction that has been fetched from main memory.

Why: Decode point only (1); it does not explain the purpose of decoding, i.e. working out what the instruction is/what operation is required.

No marks0/2

It adds the two numbers together and stores the result in a register.

Why: Misconception: arithmetic is carried out by the ALU, which the mark scheme's Do not accept line covers.

Questions by topic

2.1 Binary

Build a paper on this topic 58
Adding Binary Numbers 6 questions Binary and Hexadecimal Basics 10 questions Binary Shifts 6 questions Binary to Denary Conversion 6 questions Binary to Hexadecimal Conversion 6 questions Denary to Binary Conversion 6 questions Denary to Hexadecimal Conversion 6 questions Denary to Negative Binary Conversion 6 questions Hexadecimal to Binary Conversion 6 questions

2.2 Data representation

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Character Sets 18 questions Images 19 questions Sound 19 questions

2.3 Data storage and compression

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Compression 18 questions Units & Conversion 6 questions

3.1 Hardware

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Embedded Systems 17 questions Fetch Decode Execute Cycle 15 questions Primary Memory 15 questions Secondary Memory 15 questions Stored Program Computers 15 questions

3.2 Software

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File Management 18 questions Memory Management 16 questions Peripheral Management 11 questions Process Management 12 questions Purpose & Function of Operating Systems 17 questions Software Basics 13 questions User Management 18 questions Utility Software 19 questions

3.3 Programming languages

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Low and High Level Languages 19 questions Translators 18 questions

4.1 Networks

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Addressing 16 questions LANs & WANs 16 questions Network Speed 5 questions Packet Switching 16 questions Protocols & Layers 17 questions The Internet 16 questions Topologies 17 questions Wired Connections 17 questions Wireless Connections 18 questions

4.2 Network security

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Network Security Risks 18 questions Preventing Network Security Risks 18 questions

5.1 Environmental

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E-waste 17 questions Manufacturing Technology 19 questions

5.2 Ethical and legal

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Data Protection Act 17 questions Impact of AI 18 questions Intellectual Property 18 questions Software Licences 18 questions

5.3 Cybersecurity

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Malware 18 questions Social Engineering 12 questions

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