Edexcel GCSE Computer Science (1CP2) Exam Questions

• C Main memory (RAM) (1)
• The only correct answer is C. The correct answer is main memory (RAM); accept 'main memory', 'RAM' or 'random access memory'.
• A is not correct because the arithmetic logic unit performs arithmetic and logical operations
• B is not correct because the clock sends regular pulses to synchronise the components of the CPU
• D is not correct because the program counter holds the address of the next instruction, not the instructions and data

• A Blu-ray Disc (1)
• The only correct answer is A. The correct answer is Blu-ray Disc.
• B is not correct because a CD stores less data than a Blu-ray Disc, up to about 700 MB
• C is not correct because a DVD stores less data than a Blu-ray Disc, up to about 4.7 GB (single-layer) or 8.4 GB (dual-layer)
• D is not correct because magnetic tape is not an optical storage medium

Award one mark for:

• Volatile (1)

Allow volatile memory / it is volatile.

Do not accept non-volatile, ROM, RAM or temporary/short term memory on their own, as these are not the term asked for.

Award one mark for any of the following up to a maximum of two marks:

• (Storage that is) non-volatile / keeps its data when the power is turned off (1)
• (Storage that is) used to store programs and data/files (for later use) (1)
• (Storage that is) not directly accessible by the CPU / not directly accessed by the CPU (1)

Allow both the non-volatile point and the stores programs and data point from one sentence if each idea is clearly stated, e.g. 'non-volatile storage that holds programs and data'.

Allow accessed via the CPU / must be copied into RAM before the CPU can use it for the third point.

Do not accept volatile / loses its data when the power is turned off.

Do not accept a description of primary storage, such as RAM or ROM.

Do not accept capacity.

Do not accept an example device on its own (e.g. hard disk drive).

Award up to two marks for a linked description such as:

• A read/write head moves over the surface of the disk (1) to read/write data by detecting or changing the magnetic alignment of areas of the surface (1)
• The head magnetises areas of the disk surface in different directions (1) so each area represents a binary 1 or 0 (1)
• Data is stored on concentric circles called tracks (1) which are divided into sectors (1)

Allow one mark for tracks/concentric circles on their own.

For the second mark in the first two bullets, the response must refer to the magnetic alignment/charge being detected or changed, not just that the head reads/writes data.

Do not award a mark for 'it is magnetic' or 'it stores data in binary' with no description of how the data is stored.

Do not accept descriptions of optical storage (e.g. a laser, pits and lands) or solid state storage (e.g. electric charges in chips).

Award up to two marks for a linked explanation such as:

• (The ECU) is more reliable/less likely to crash (1) because it only runs the one program/has a single purpose (1)
• (The ECU) cannot be affected by other software/viruses (1) because it cannot run other software/it can only run the program it was made for (1)
• (The ECU) is cheaper (1) because it has limited processing resources/less memory/simple components (1)
• (The ECU) uses less power (1) because it has limited processing resources/a simpler processor (1)
• (The ECU) is smaller (1) because it has fewer components/less memory than a general purpose computer (1)

For both marks, the expansion must follow/associate with the statement.

A suitable benefit stated on its own earns one mark.

Do not accept a description or a location given as the reason, e.g. 'because it is part of the car', 'because it is inside the engine', 'because it is embedded'.

Do not accept a description of an embedded system on its own as the benefit, e.g. 'it does one specific job' or 'it is part of the car'.

Do not accept 'it is faster'/'it has a more powerful processor' as embedded systems have limited processing resources.

Award up to two marks for a linked explanation such as:

• The instructions/program instructions and data are stored together in main memory/RAM (1) so the CPU can fetch each instruction (from its address) and execute it (1)
• The instructions/program instructions are held in main memory/RAM (1) rather than being built into/part of the hardware, so the computer does not need to be rewired/rebuilt to run a different program (1)
• The next instruction to be executed/instruction is held in main memory/RAM (1) so the CPU can fetch it using its address before it is decoded and executed (1)

For both marks, the expansion must follow/associate with the statement.

A point/statement on its own can only earn one mark.

Do not accept a response that only refers to data being stored in main memory/RAM without referring to the instructions/program instructions.

Do not accept instructions/programs being stored on the hard disk/backing store.

Do not accept 'the program is stored in memory' without saying that it is the instructions/program instructions that are stored there.

Indicative content

Control unit and ALU

• The control unit fetches and decodes each instruction that the new computers are running, so it works out which operation has to be carried out.
• The control unit sends control signals to the ALU and to main memory over the control bus so that the other components carry out the instruction.
• The control unit receives the clock signal, so each stage of the cycle begins on a clock tick.
• The ALU carries out arithmetic operations, such as adding two values, and logical operations, such as comparing two values, during the execute stage.
• The ALU is the component that performs the calculations that a program running on the new computers needs.
• The data the ALU works on is held in registers, and the result of the operation is stored in a register such as the accumulator.

Registers

• Registers are small, very fast memory locations inside the CPU that hold the instructions and data the CPU is working on.
• The program counter holds the address of the next instruction to be fetched, and it is incremented each time an instruction is fetched.
• The memory address register (MAR) holds the address of the main memory location that is to be read from or written to during the fetch stage.
• The memory data register (MDR) holds the instruction or data brought from main memory (RAM) over the data bus before it is decoded.
• The accumulator holds the result of an operation carried out by the ALU.
• Because registers are inside the CPU, the CPU can keep working on a value without going back to slower main memory during the cycle.

Working together as the cycle repeats

• In the fetch stage, the address of the next instruction is copied from the program counter into the memory address register and sent to main memory over the address bus, and the instruction comes back over the data bus into the memory data register.
• In the decode stage the control unit interprets the instruction and works out which components are needed for it.
• In the execute stage the control unit signals the ALU or main memory so that the instruction is carried out, and the result is held in a register.
• The clock sends a regular pulse so that the fetch, decode and execute stages of each instruction happen in step.
• The program counter is then incremented, so the cycle repeats with the address of the next instruction to be fetched.

Levels

• Level 0 (0 marks): No rewardable content.
• Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
• Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
• Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)

Additional guidance

• A list of correct but independent roles, with no linkage between the components and no reference to the stages of the cycle, is limited to Level 1; an answer that gives the roles of the components but does not link them to the fetch, decode and execute stages is limited to Level 2; a Level 3 answer must cover the control unit/ALU and registers and link them to the stages of the cycle.
• Award no credit for 'the control unit is the brain of the CPU', 'the ALU stores data' or 'registers are the same as RAM'; accept the program counter, MAR, MDR and accumulator as examples of registers, accept the clock, address bus, data bus and control bus where they are linked to a stage of the cycle, and accept 'main memory' or 'RAM' as equivalent.

Indicative content

What each bus carries

• The address bus carries the address of a memory location that the CPU wants to read from or write to.
• The data bus carries data and instructions between the CPU and main memory, and between the CPU and other components such as the input and output controllers.
• The control bus carries control signals, such as read and write, that coordinate the activities of the computer.
• The clock is a separate component that sends regular pulses, and the control bus carries the signals that keep the other components in time with those pulses.

Direction

• The address bus is one-way, carrying addresses from the CPU to main memory.
• The data bus is two-way, so data and instructions can travel both to and from the CPU.
• The control bus carries control signals from the control unit to the other components, and it is not the clock signal itself.
• The number of bits in the address bus determines how many memory locations can be addressed, and the number of bits in the data bus determines how much can be transferred at one time.

The role of the buses in the fetch-decode-execute cycle

• Fetch: the address of the next instruction, held in a register in the CPU, is placed on the address bus so that main memory knows which location to read.
• Fetch: the control unit sends a read signal on the control bus to main memory.
• Fetch: the instruction held in that location is returned to the CPU on the data bus.
• Decode: the control unit decodes the instruction and sends control signals on the control bus to set up the other components, for example telling the ALU which operation to carry out.
• Execute: the address of any data needed is placed on the address bus, a read or write signal is sent on the control bus, and the data itself travels between the CPU and main memory on the data bus.
• The cycle repeats, with each step taking place in time with a pulse from the clock.

Level 3 responses must cover all three buses and link them to the fetch-decode-execute cycle, including the fetch stage and at least one of the decode and execute stages. Answers that describe each bus correctly but link none of them to a stage of the cycle are limited to Level 1.

Do not accept 'the address bus carries data', 'the data bus carries addresses', 'the data bus carries instructions only during the fetch stage', 'the control bus carries the clock signal' or 'the control bus is the clock'; the clock is a separate component whose pulses the control signals coordinate with.

Levels

• Level 0 (0 marks): No rewardable content.
• Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
• Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
• Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)