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Edexcel GCSE Computer Science (1CP2) Exam Questions

Build a practice paper from 631 exam-style questions, each with its mark scheme and example answers. Print it, or answer it on paper and then open the mark schemes. Or browse the questions by topic.

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5 questions · 13 marks

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1Multiple choice1 markFetch Decode Execute Cycle Swap Remove

Identify the component that stores instructions and data during the fetch-decode-execute cycle.

[1 mark]
  • AArithmetic logic unit
  • BClock
  • CMain memory (RAM)
  • DProgram counter
Mark scheme
  • C Main memory (RAM) (1)
  • The only correct answer is C. The correct answer is main memory (RAM); accept 'main memory', 'RAM' or 'random access memory'.
  • A is not correct because the arithmetic logic unit performs arithmetic and logical operations
  • B is not correct because the clock sends regular pulses to synchronise the components of the CPU
  • D is not correct because the program counter holds the address of the next instruction, not the instructions and data
Example answers and how they were marked
Full marks1/1

C Main memory (RAM)

Why: Correct option: main memory (RAM) stores instructions and data during the fetch-decode-execute cycle (1).

No marks0/1

D Program counter

Why: Near-miss distractor: the program counter holds the address of the next instruction, not the instructions and data (0).

No marks0/1

A Arithmetic logic unit

Why: Misconception: the ALU performs arithmetic and logical operations, so it does not store instructions and data (0).

2Short recall2 marksSecondary Memory Swap Remove

Computers have both primary storage and secondary storage.

Define the term secondary storage.

[2 marks]
Mark scheme

Award one mark for any of the following up to a maximum of two marks:

  • (Storage that is) non-volatile / keeps its data when the power is turned off (1)
  • (Storage that is) used to store programs and data/files (for later use) (1)
  • (Storage that is) not directly accessible by the CPU / not directly accessed by the CPU (1)

Allow both the non-volatile point and the stores programs and data point from one sentence if each idea is clearly stated, e.g. 'non-volatile storage that holds programs and data'.

Allow accessed via the CPU / must be copied into RAM before the CPU can use it for the third point.

Do not accept volatile / loses its data when the power is turned off.

Do not accept a description of primary storage, such as RAM or ROM.

Do not accept capacity.

Do not accept an example device on its own (e.g. hard disk drive).

Example answers and how they were marked
Full marks2/2

Secondary storage is non-volatile, so it does not lose data when the power is turned off. It is used to store programs and data files for later use.

Why: Non-volatile / keeps data when the power is off (1) and used to store programs and data files (1), each idea clearly stated.

Some marks1/2

Secondary storage is used to store programs and data files.

Why: Stores programs and data/files (1), but nothing is said about it being non-volatile or not directly accessible by the CPU.

No marks0/2

Secondary storage is volatile memory that holds the data the CPU is using at the moment.

Why: Describes primary storage (RAM) and says it is volatile, which the mark scheme says not to accept, so no marks are awarded.

3Describe2 marksSecondary Memory Swap Remove

A computer uses a magnetic hard disk.

Describe how data is stored on a magnetic hard disk.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • A read/write head moves over the surface of the disk (1) to read/write data by detecting or changing the magnetic alignment of areas of the surface (1)
  • The head magnetises areas of the disk surface in different directions (1) so each area represents a binary 1 or 0 (1)
  • Data is stored on concentric circles called tracks (1) which are divided into sectors (1)

Allow one mark for tracks/concentric circles on their own.

For the second mark in the first two bullets, the response must refer to the magnetic alignment/charge being detected or changed, not just that the head reads/writes data.

Do not award a mark for 'it is magnetic' or 'it stores data in binary' with no description of how the data is stored.

Do not accept descriptions of optical storage (e.g. a laser, pits and lands) or solid state storage (e.g. electric charges in chips).

Example answers and how they were marked
Full marks2/2

The read/write head moves over the magnetic surface and magnetises areas of the disk to store the 1s and 0s.

Why: Head moves over the surface (1) and magnetises areas to represent 1s and 0s (1).

Some marks1/2

The data is stored on tracks on the disk.

Why: Tracks/concentric circles (1), but no development such as tracks divided into sectors.

No marks0/2

It is magnetic and saves the data in 1s and 0s.

Why: Near-miss: 'magnetic' alone and 'data in binary/1s and 0s' with no description of how data is stored, which the mark scheme does not award.

4Explain2 marksEmbedded Systems Swap Remove

A fitness tracker is worn on the wrist and uses an embedded system to count the wearer's steps.

Explain one reason why an embedded system is used in a fitness tracker.

[2 marks]
Mark scheme

Award up to two marks for a linked explanation such as:

  • The battery lasts longer/needs charging less often (1) because embedded systems have low power consumption/use less power (1)
  • It can be made small/light enough to wear on the wrist (1) because the processor, memory and input/output are combined on a single chip/microcontroller (1)
  • It can carry out the step-counting function reliably (1) because it runs a single/dedicated program and cannot install other software (1)
  • It has a low cost per unit (1) because it uses fewer/less powerful components than a general purpose computer (1)

For both marks, the expansion must follow/associate with the statement.

Award one mark for a valid point stated on its own, e.g. 'it is small/light enough to wear on the wrist' (1) or 'its battery lasts longer before it needs charging' (1).

Accept the same linked ideas in either order, e.g. 'it uses less power (1) so the battery lasts longer (1)'.

Do not accept 'it uses less power'/'low power' on its own as a complete explanation; it must be linked to the battery lasting longer/needing charging less often for the second mark.

Do not accept an expansion that simply restates the point, e.g. 'it is small (1) so it fits on the wrist' earns only the point mark; 'fits on the wrist' is not a linked cause and is not enough for the second mark.

Do not accept 'the battery is small' as the linked reason for low power consumption.

Do not accept responses that say other software/apps can be installed on an embedded system (0); embedded systems have a single/dedicated function and cannot install new software.

Example answers and how they were marked
Full marks2/2

The battery lasts longer before it needs charging because an embedded system has low power consumption.

Why: Point (1) and linked reason (1); low power consumption explains why the battery lasts longer.

Some marks1/2

It is small so it fits on the wearer's wrist.

Why: Point 'small' earns (1); 'fits on the wrist' restates the point rather than giving the linked cause (components combined on a single chip), so no second mark.

No marks0/2

It can run other apps as well because it is a tiny computer.

Why: Misconception that embedded systems can install other software; no creditworthy point or linked reason.

5Discuss6 marksFetch Decode Execute Cycle Swap Remove

A school is upgrading the desktop computers in its computer science classroom. Each computer has a CPU, main memory and buses. The technician is explaining how the CPU uses these components during the fetch-decode-execute cycle.

Discuss how the CPU uses its components and the buses during the fetch-decode-execute cycle.

Your answer should consider:

  • the role of the CPU and registers
  • the role of the address bus, data bus and control bus
  • the role of the clock.
[6 marks]
Mark scheme

Indicative content

The role of the CPU and registers

  • The control unit decodes the instruction fetched from main memory and controls the other components during the cycle.
  • The ALU carries out arithmetic and logical operations during the execute stage, such as adding two values held in registers.
  • Registers hold the data, addresses and results that the CPU is working on during the cycle.
  • The program counter holds the address of the next instruction to be fetched, so it is incremented after each fetch.
  • The memory address register holds the address of the memory location that is about to be read or written.
  • The memory data register holds the instruction or data that has been fetched from or is being written to main memory.

The role of the address bus, data bus and control bus

  • The address bus carries the address of the memory location that the CPU needs to access from the CPU to main memory.
  • The address bus is one-way, so addresses are only sent from the CPU to main memory.
  • The data bus carries instructions and data between the CPU and main memory, so it is bi-directional.
  • The width of the data bus affects how many bits can be transferred at one time.
  • The control bus carries control signals such as read and write signals, so main memory knows whether the CPU wants to read an instruction or write data.
  • The control bus carries signals from the control unit to coordinate the components during the fetch-decode-execute cycle.

The role of the clock

  • The clock sends regular pulses that synchronise the actions of the CPU and main memory.
  • Each clock pulse triggers the next step of the fetch-decode-execute cycle, so the stages happen in the correct order.
  • The clock provides a regular timing signal so that the fetch-decode-execute cycle repeats at a steady rate.
  • The clock is separate from the control bus; the control bus carries control signals, while the clock provides timing pulses.
  • Do not credit the address bus storing addresses, the data bus storing data, or the control bus controlling the computer without naming a control signal; do not credit clock speed affecting performance as a role in the cycle.
  • Level 3 responses must cover all three bullets and link them to the fetch-decode-execute cycle; Level 2 answers may identify roles but link them only partly to the cycle.

Levels

  • Level 0 (0 marks): No rewardable content.
  • Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
  • Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
  • Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)
Example answers and how they were marked
Full marks6/6

The control unit decodes each instruction that is fetched from main memory and then controls the other components to execute it. The program counter holds the address of the next instruction, and this address is copied to the memory address register before it is sent along the address bus. The address bus carries this address from the CPU to main memory, and it is one-way. The data bus then carries the instruction back from main memory to the CPU; it is bi-directional, so it can also carry data to be written. The memory data register holds the instruction that has been fetched. The control bus carries read and write signals from the control unit, so memory knows whether the CPU wants to read an instruction or write data. During the execute stage, the ALU performs arithmetic or logical operations on data held in registers. The clock sends regular pulses that synchronise each stage, so one fetch, decode or execute step happens on each tick and the cycle repeats in the correct order.

Why: Comprehensive understanding of the CPU, registers, all three buses and the clock, with sustained application to the fetch-decode-execute cycle. Level 3.

Some marks4/6

The address bus carries the address of the next instruction from the program counter to main memory so it can be fetched. The data bus carries the instruction back to the CPU, and it is bi-directional. The control unit decodes the instruction. The clock sends pulses to keep the stages in order.

Why: Adequate understanding of some roles with some linkage to the fetch-decode-execute cycle, but the control bus, ALU and most registers are not covered. Level 2.

Some marks1/6

The data bus carries data between the CPU and RAM. The address bus stores the addresses that the CPU needs. The control bus controls the computer. The clock is the speed of the CPU.

Why: One basic, independent point (the data bus carries data) (1). The address bus does not store addresses, the control bus point names no control signal and clock speed is not a role in the cycle, so no further credit. Level 1.

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