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Edexcel GCSE Computer Science (1CP2) Exam Questions

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5 questions · 8 marks

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1Multiple choice1 markFetch Decode Execute Cycle Swap Remove

Identify the component that stores instructions and data during the fetch-decode-execute cycle.

[1 mark]
  • AArithmetic logic unit
  • BClock
  • CMain memory (RAM)
  • DProgram counter
Mark scheme
  • C Main memory (RAM) (1)
  • The only correct answer is C. The correct answer is main memory (RAM); accept 'main memory', 'RAM' or 'random access memory'.
  • A is not correct because the arithmetic logic unit performs arithmetic and logical operations
  • B is not correct because the clock sends regular pulses to synchronise the components of the CPU
  • D is not correct because the program counter holds the address of the next instruction, not the instructions and data
Example answers and how they were marked
Full marks1/1

C Main memory (RAM)

Why: Correct option: main memory (RAM) stores instructions and data during the fetch-decode-execute cycle (1).

No marks0/1

D Program counter

Why: Near-miss distractor: the program counter holds the address of the next instruction, not the instructions and data (0).

No marks0/1

A Arithmetic logic unit

Why: Misconception: the ALU performs arithmetic and logical operations, so it does not store instructions and data (0).

2Short recall1 markPrimary Memory Swap Remove

Computers use RAM to store the data and instructions that are in use.

Name the term used to describe memory that loses its contents when the power is switched off.

[1 mark]
Mark scheme

Award one mark for:

  • Volatile (1)

Allow volatile memory / it is volatile.

Do not accept non-volatile, ROM, RAM or temporary/short term memory on their own, as these are not the term asked for.

Example answers and how they were marked
Full marks1/1

Volatile

Why: Correct term for memory that loses its contents when the power is switched off (1).

No marks0/1

Temporary memory

Why: Describes what such memory does but is not the term asked for; 'temporary memory' is on the Do not accept line, so no mark.

No marks0/1

Non-volatile

Why: Non-volatile memory keeps its contents when the power is switched off, the opposite of what the question describes; it is explicitly not accepted.

3Short recall2 marksSecondary Memory Swap Remove

Computers have both primary storage and secondary storage.

Define the term secondary storage.

[2 marks]
Mark scheme

Award one mark for any of the following up to a maximum of two marks:

  • (Storage that is) non-volatile / keeps its data when the power is turned off (1)
  • (Storage that is) used to store programs and data/files (for later use) (1)
  • (Storage that is) not directly accessible by the CPU / not directly accessed by the CPU (1)

Allow both the non-volatile point and the stores programs and data point from one sentence if each idea is clearly stated, e.g. 'non-volatile storage that holds programs and data'.

Allow accessed via the CPU / must be copied into RAM before the CPU can use it for the third point.

Do not accept volatile / loses its data when the power is turned off.

Do not accept a description of primary storage, such as RAM or ROM.

Do not accept capacity.

Do not accept an example device on its own (e.g. hard disk drive).

Example answers and how they were marked
Full marks2/2

Secondary storage is non-volatile, so it does not lose data when the power is turned off. It is used to store programs and data files for later use.

Why: Non-volatile / keeps data when the power is off (1) and used to store programs and data files (1), each idea clearly stated.

Some marks1/2

Secondary storage is used to store programs and data files.

Why: Stores programs and data/files (1), but nothing is said about it being non-volatile or not directly accessible by the CPU.

No marks0/2

Secondary storage is volatile memory that holds the data the CPU is using at the moment.

Why: Describes primary storage (RAM) and says it is volatile, which the mark scheme says not to accept, so no marks are awarded.

4Explain2 marksFetch Decode Execute Cycle Swap Remove

The CPU carries out the fetch-decode-execute cycle.

Explain one reason why the address bus is used in the fetch stage of the fetch-decode-execute cycle.

[2 marks]
Mark scheme

Award up to two marks for a linked explanation such as:

  • The address bus carries the address of the next instruction (1) so the CPU can locate/fetch it from main memory/RAM (1)
  • The address bus carries the address of the memory location to be read (1) so the instruction/data stored there can be located/accessed (1)
  • The CPU needs to know where the next instruction is stored (1) so the address bus sends the address to main memory/RAM (1)

For both marks, the expansion must follow/associate with the statement.

Allow 'from the program counter/PC' as part of the point for one mark, e.g. the address bus carries the address from the program counter (1), but the second mark needs the destination or purpose (e.g. to locate/fetch the instruction in main memory/RAM).

Do not award the second mark for naming the program counter/PC alone.

Do not accept answers that say the address bus carries data/instructions from main memory to the CPU, as these travel on the data bus.

Do not accept answers that say the address bus stores the address.

Do not allow an answer that only restates that the address bus carries addresses without saying which address or why it is needed.

Example answers and how they were marked
Full marks2/2

The address bus carries the address of the next instruction from the program counter to main memory, so that the CPU can locate the instruction that is to be fetched.

Why: Linked point (1) and reason (1).

Some marks1/2

The address bus carries the address of the next instruction from the program counter.

Why: Point only (1); the second mark is not awarded because the destination/purpose of locating or fetching the instruction is missing.

No marks0/2

It carries the instruction from main memory back to the CPU so that it can be decoded.

Why: Misconception: instructions travel on the data bus, which the mark scheme's Do not accept line covers.

5Explain2 marksFetch Decode Execute Cycle Swap Remove

The control unit is part of the CPU.

Explain the role of the control unit in the fetch-decode-execute cycle.

[2 marks]
Mark scheme

Award up to two marks for a linked explanation such as:

  • Decodes/interprets/translates the instruction (1) to work out what the instruction is/what operation is required (1)
  • Sends control signals to the other components (1) so that the correct component carries out the instruction (1), e.g. the ALU/main memory
  • Controls the fetch of the instruction from main memory (1) because the address of the next instruction is sent via the address bus (1)
  • Controls the fetch of the next instruction from main memory (1) by sending a control signal/read signal to main memory (1)

For both marks, the expansion must follow/associate with the statement.

For the decode point, 'decodes the instruction' alone gains 1 mark; a second mark needs the purpose of decoding, i.e. working out what the instruction is/what operation is required.

Do not accept 'it controls the CPU' on its own, without naming a task in the cycle.

Do not accept 'it fetches the instruction from memory' on its own, as this describes the fetch step rather than the control unit's role; credit only if linked to controlling/signalling the fetch.

Do not accept carrying out arithmetic/logical operations, as these are carried out by the ALU, or holding the address of the next instruction, as this is the program counter.

Do not accept storing the instruction in a register (e.g. MAR/MDR), as this is not the role of the control unit.

Example answers and how they were marked
Full marks2/2

The control unit decodes each instruction, working out what it means, so that the CPU knows which component should carry it out.

Why: Linked point (1) and reason (1): decodes/interprets the instruction, and works out what it is/what operation is required.

Some marks1/2

It decodes the instruction that has been fetched from main memory.

Why: Decode point only (1); it does not explain the purpose of decoding, i.e. working out what the instruction is/what operation is required.

No marks0/2

It adds the two numbers together and stores the result in a register.

Why: Misconception: arithmetic is carried out by the ALU, which the mark scheme's Do not accept line covers.

Questions by topic

2.1 Binary

Build a paper on this topic 58
Adding Binary Numbers 6 questions Binary and Hexadecimal Basics 10 questions Binary Shifts 6 questions Binary to Denary Conversion 6 questions Binary to Hexadecimal Conversion 6 questions Denary to Binary Conversion 6 questions Denary to Hexadecimal Conversion 6 questions Denary to Negative Binary Conversion 6 questions Hexadecimal to Binary Conversion 6 questions

2.2 Data representation

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Character Sets 18 questions Images 19 questions Sound 19 questions

2.3 Data storage and compression

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Compression 18 questions Units & Conversion 6 questions

3.1 Hardware

Build a paper on this topic 77
Embedded Systems 17 questions Fetch Decode Execute Cycle 15 questions Primary Memory 15 questions Secondary Memory 15 questions Stored Program Computers 15 questions

3.2 Software

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File Management 18 questions Memory Management 16 questions Peripheral Management 11 questions Process Management 12 questions Purpose & Function of Operating Systems 17 questions Software Basics 13 questions User Management 18 questions Utility Software 19 questions

3.3 Programming languages

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Low and High Level Languages 19 questions Translators 18 questions

4.1 Networks

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Addressing 16 questions LANs & WANs 16 questions Network Speed 5 questions Packet Switching 16 questions Protocols & Layers 17 questions The Internet 16 questions Topologies 17 questions Wired Connections 17 questions Wireless Connections 18 questions

4.2 Network security

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Network Security Risks 18 questions Preventing Network Security Risks 18 questions

5.1 Environmental

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E-waste 17 questions Manufacturing Technology 19 questions

5.2 Ethical and legal

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Data Protection Act 17 questions Impact of AI 16 questions Intellectual Property 12 questions

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