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Edexcel GCSE Computer Science (1CP2) Exam Questions

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9 questions · 18 marks

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1Multiple choice1 markCompression Swap Remove

Identify the definition of lossy compression.

[1 mark]
  • AData is removed only while the file is being transmitted
  • BData is permanently removed to reduce the file size
  • CData is restored exactly when it is decompressed
  • DData is stored using a dictionary of repeated patterns
Mark scheme
  • B Data is permanently removed to reduce the file size (1)
  • The only correct answer is B. The correct answer is data is permanently removed to reduce the file size.
  • A is not correct because the data removed by a lossy algorithm is not restored after transmission
  • C is not correct because that describes lossless compression, where the original file is rebuilt exactly
  • D is not correct because dictionary encoding is a lossless method that records repeated patterns once
Example answers and how they were marked
Full marks1/1

B Data is permanently removed to reduce the file size

Why: Correct option (1).

No marks0/1

C Data is restored exactly when it is decompressed

Why: Near miss: this describes lossless compression, so no mark.

No marks0/1

A Data is removed only while the file is being transmitted

Why: Misconception that compression only applies during transmission; the data is removed permanently, so no mark.

2Multiple choice1 markAddressing Swap Remove

A packet of data is sent across the internet to a web server. The packet has a header that stores information about the packet.

Identify the information in the packet header that a router uses to forward the packet towards its destination.

[1 mark]
  • AThe destination domain name
  • BThe destination IP address
  • CThe MAC address of the sender
  • DThe name of the file being sent
Mark scheme
  • B The destination IP address (1)
  • The only correct answer is B. The correct answer is the destination IP address.
  • A is not correct because a domain name is converted to an IP address by a DNS server before routing begins
  • C is not correct because the sender's MAC address is only used to deliver the packet on the local network
  • D is not correct because the file name is not used to route packets
Example answers and how they were marked
Full marks1/1

B The destination IP address

Why: Correct option (1): a router reads the destination IP address in the header to forward the packet towards its destination.

No marks0/1

A The destination domain name

Why: A domain name is converted to an IP address by a DNS server before routing begins, so it is not the routing information in the header (mark scheme line A); no mark.

No marks0/1

C The MAC address of the sender

Why: The sender's MAC address is only used to deliver the packet on the local network, so it is not used by the router to forward the packet (mark scheme line C); no mark.

3Short recall1 markThe Internet Swap Remove

Data packets are sent across the internet.

Name the device that uses IP addresses to forward a data packet from one network to another.

[1 mark]
Mark scheme

Award one mark for:

  • Router (1)

Allow routers (plural).

Allow minor spelling errors that are clearly router, e.g. rooter.

Do not accept switch, hub (these forward data within a network, not between networks), modem or server.

Do not accept gateway on its own.

Example answers and how they were marked
Full marks1/1

Router

Why: Correct device named (1).

No marks0/1

Modem

Why: Modem is not accepted; it is not the device that forwards packets between networks (0).

No marks0/1

Server

Why: A server is not accepted; it does not forward packets between networks (0).

4Convert1 markBinary to Denary Conversion Swap Remove

Computers manipulate binary patterns.

Convert the binary pattern 1010 0100 to denary.

[1 mark]
Mark scheme

Award one mark for:

  • 164 (1)
Example answers and how they were marked
Full marks1/1

164

Why: Correct: 128 + 32 + 4 = 164 (1).

No marks0/1

37

Why: Reads the place values from the wrong end (the left-hand bit as 1), so the value is wrong.

No marks0/1

3

Why: Counts the 1s instead of adding their place values.

5Short recall2 marksCharacter Sets Swap Remove

ASCII is a character set that uses 7 bits to represent each character.

Give two limitations of 7-bit ASCII when it is used to represent text.

[2 marks]
Mark scheme

Award one mark for any of the following up to a maximum of two marks:

  • (Only) 128 different characters can be represented / 7 bits give 2^7 = 128 different codes (1)
  • It cannot represent characters from languages other than English / non-English alphabets, e.g. Greek, Chinese (1)
  • It cannot represent accented characters, e.g. é, ñ (1)
  • It cannot represent symbols or emoji that are not in the ASCII character set (1)

Award a maximum of one mark for the last three bullets, as they are all examples of characters that fall outside the 128 ASCII codes.

Allow 'it can only represent 128 characters, so some characters are missing' for the first bullet.

Do not accept 'it uses 7 bits' / 'it only uses 7 bits' on its own, without saying what this limits.

Do not accept 'it can only store a limited amount of text' / 'it can only store short messages', as 7 bits limits the number of characters available, not the length of a message.

Do not accept 'it can only represent the characters in the ASCII character set', as this repeats the question.

Do not accept 'it is old/out of date' or 'it cannot store numbers'.

Example answers and how they were marked
Full marks2/2

Only 128 different characters can be represented, so it cannot store characters from other languages such as Greek.

Why: 128 character limit (1) and characters from other languages (1); two separate creditworthy limitations.

Some marks1/2

It cannot show accented characters like é and it only uses 7 bits.

Why: Accented characters (1); 'only uses 7 bits' is not qualified, so scores 0.

No marks0/2

It only uses 7 bits, so it can only store a small amount of text.

Why: Scores 0: text length is not a limitation of 7-bit ASCII, and 'only uses 7 bits' is unqualified; both Do not accept lines apply.

6Short recall2 marksUnits & Conversion Swap Remove

A solid state drive has a capacity of 5 gibibytes.

Give an expression to calculate the number of bits in 5 gibibytes. You do not need to do the calculation.

[2 marks]
Mark scheme

Award one mark for each of:

  • 5 × 1024^3 / 5 × 1024 × 1024 × 1024 / 5 × 2^30, for the number of bytes (1)
  • A fully correct expression with × 8 to convert bytes to bits, in any order, e.g. 5 × 1024^3 × 8, 8 × 5 × 2^30 (1)

Accept 5 × 1 073 741 824 × 8.

Accept 5 × 2^33 or 42 949 672 960 as a fully correct expression (2 marks).

Do not accept 5 × 1000^3 × 8, which uses decimal multiples.

Do not accept ÷ 8, which converts bits to bytes.

Example answers and how they were marked
Full marks2/2

8 × 5 × 2^30

Why: 5 × 2^30 is the number of bytes (1) and × 8 converts bytes to bits (1).

Some marks1/2

5 × 2^30

Why: Correct number of bytes using the binary multiple 2^30 (1), but no conversion to bits.

No marks0/2

5 × 1000^3 × 8

Why: Uses decimal 1000^3 instead of binary 1024^3, so the expression is not fully correct; no creditworthy point.

7Describe2 marksUser Management Swap Remove

An operating system manages the users of a computer.

Describe how an operating system checks that a user is allowed to log in.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • The user enters a username/user ID and password/PIN (1) which is compared with the account details the operating system has stored (1)
  • The operating system keeps a file/list/database of users and their passwords (1) to check the login details the user enters against (1)
  • The operating system compares the entered details with the details stored for that user (1) and if they do not match, access is refused/denied (1)
  • The entered details are checked against the access rights stored for that user (1) so access is only allowed when the details are correct (1)

Do not award for 'it asks for a password' on its own, without saying what the password is checked against.

A stored list/file of users and passwords with no check of the login details earns one mark only.

Do not accept responses about file management, such as finding or opening the user's files.

Example answers and how they were marked
Full marks2/2

The user types in a username and password. The operating system compares these with the details it has stored for that account, and if they match the user is allowed to log in.

Why: Username and password entered (1) which is compared with the account details the operating system has stored (1).

Some marks1/2

The operating system has a list of all the users and their passwords.

Why: The stored list of users and passwords (1), but no check of the login details against it, so the development mark is not earned (0); the mark scheme states a list alone earns one mark only.

No marks0/2

The operating system finds the user's files on the hard drive and opens the last one they saved.

Why: Describes file management, not checking a user's login details; the mark scheme says not to accept responses about file management, so there is no creditworthy point.

8Convert2 marksDenary to Binary Conversion Swap Remove

Binary patterns can represent numbers.

Convert the denary number 199 to 8-bit binary.

[2 marks]
Mark scheme

Award one mark for each correct nibble in the correct order:

  • 1100 (1)
  • 0111 (1)

0 marks if the response is not 8-bit binary.

Example answers and how they were marked
Full marks2/2

1100 0111

Why: 199 = 128 + 64 + 4 + 2 + 1: both nibbles are correct (2).

Some marks1/2

1100 1000

Why: Converts 200 instead (a slip in adding up the place values). The first nibble is correct (1); the second is not.

No marks0/2

1110 0011

Why: The bits are written in reverse, smallest place value first. Neither nibble is correct.

9Discuss6 marksFetch Decode Execute Cycle Swap Remove

A school is upgrading the desktop computers in its computer science classroom. Each computer has a CPU, main memory and buses. The technician is explaining how the CPU uses these components during the fetch-decode-execute cycle.

Discuss how the CPU uses its components and the buses during the fetch-decode-execute cycle.

Your answer should consider:

  • the role of the CPU and registers
  • the role of the address bus, data bus and control bus
  • the role of the clock.
[6 marks]
Mark scheme

Indicative content

The role of the CPU and registers

  • The control unit decodes the instruction fetched from main memory and controls the other components during the cycle.
  • The ALU carries out arithmetic and logical operations during the execute stage, such as adding two values held in registers.
  • Registers hold the data, addresses and results that the CPU is working on during the cycle.
  • The program counter holds the address of the next instruction to be fetched, so it is incremented after each fetch.
  • The memory address register holds the address of the memory location that is about to be read or written.
  • The memory data register holds the instruction or data that has been fetched from or is being written to main memory.

The role of the address bus, data bus and control bus

  • The address bus carries the address of the memory location that the CPU needs to access from the CPU to main memory.
  • The address bus is one-way, so addresses are only sent from the CPU to main memory.
  • The data bus carries instructions and data between the CPU and main memory, so it is bi-directional.
  • The width of the data bus affects how many bits can be transferred at one time.
  • The control bus carries control signals such as read and write signals, so main memory knows whether the CPU wants to read an instruction or write data.
  • The control bus carries signals from the control unit to coordinate the components during the fetch-decode-execute cycle.

The role of the clock

  • The clock sends regular pulses that synchronise the actions of the CPU and main memory.
  • Each clock pulse triggers the next step of the fetch-decode-execute cycle, so the stages happen in the correct order.
  • The clock provides a regular timing signal so that the fetch-decode-execute cycle repeats at a steady rate.
  • The clock is separate from the control bus; the control bus carries control signals, while the clock provides timing pulses.
  • Do not credit the address bus storing addresses, the data bus storing data, or the control bus controlling the computer without naming a control signal; do not credit clock speed affecting performance as a role in the cycle.
  • Level 3 responses must cover all three bullets and link them to the fetch-decode-execute cycle; Level 2 answers may identify roles but link them only partly to the cycle.

Levels

  • Level 0 (0 marks): No rewardable content.
  • Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
  • Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
  • Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)
Example answers and how they were marked
Full marks6/6

The control unit decodes each instruction that is fetched from main memory and then controls the other components to execute it. The program counter holds the address of the next instruction, and this address is copied to the memory address register before it is sent along the address bus. The address bus carries this address from the CPU to main memory, and it is one-way. The data bus then carries the instruction back from main memory to the CPU; it is bi-directional, so it can also carry data to be written. The memory data register holds the instruction that has been fetched. The control bus carries read and write signals from the control unit, so memory knows whether the CPU wants to read an instruction or write data. During the execute stage, the ALU performs arithmetic or logical operations on data held in registers. The clock sends regular pulses that synchronise each stage, so one fetch, decode or execute step happens on each tick and the cycle repeats in the correct order.

Why: Comprehensive understanding of the CPU, registers, all three buses and the clock, with sustained application to the fetch-decode-execute cycle. Level 3.

Some marks4/6

The address bus carries the address of the next instruction from the program counter to main memory so it can be fetched. The data bus carries the instruction back to the CPU, and it is bi-directional. The control unit decodes the instruction. The clock sends pulses to keep the stages in order.

Why: Adequate understanding of some roles with some linkage to the fetch-decode-execute cycle, but the control bus, ALU and most registers are not covered. Level 2.

Some marks1/6

The data bus carries data between the CPU and RAM. The address bus stores the addresses that the CPU needs. The control bus controls the computer. The clock is the speed of the CPU.

Why: One basic, independent point (the data bus carries data) (1). The address bus does not store addresses, the control bus point names no control signal and clock speed is not a role in the cycle, so no further credit. Level 1.

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