Menu

Edexcel GCSE Computer Science (1CP2) Exam Questions

Build a practice paper from 631 exam-style questions, each with its mark scheme and example answers. Print it, or answer it on paper and then open the mark schemes. Or browse the questions by topic.

Build a paper

Topics (none ticked: all of them)
Question types (none ticked: all of them)

Practice paper

4 questions · 10 marks

Pick again
Print
1Multiple choice1 markCompression Swap Remove

Identify one reason for using data compression.

[1 mark]
  • ATo increase the number of packets sent
  • BTo reduce the time taken to transmit a file
  • CTo improve the quality of the file
  • DTo make the file harder to open
Mark scheme
  • B To reduce the time taken to transmit a file (1)
  • The only correct answer is B. The correct answer is to reduce the time taken to transmit a file.
  • A is not correct because compression reduces file size, which can reduce the number of packets sent
  • C is not correct because lossy compression can reduce the quality of a file
  • D is not correct because encryption, not compression, can make a file harder to open
Example answers and how they were marked
Full marks1/1

B To reduce the time taken to transmit a file

Why: Correct option (1).

No marks0/1

A To increase the number of packets sent

Why: Near miss: compression reduces the number of packets sent, so no mark.

No marks0/1

C To improve the quality of the file

Why: Misconception that compression improves quality; no mark.

2Short recall1 markCharacter Sets Swap Remove

A computer can store a maximum of 80 bits for a text message. Each character is stored using 7-bit ASCII.

State the maximum number of whole characters that can be stored in the message.

[1 mark]
Mark scheme

Award one mark for:

  • 11 (characters) (1)

Allow 11 remainder 3.

Allow 80 ÷ 7 = 11.428... rounded down to 11.

Do not accept 11.4 or 12 (rounding up or giving a decimal answer).

Do not award an unevaluated calculation such as 80 ÷ 7 with no answer.

Example answers and how they were marked
Full marks1/1

11

Why: Correct: 80 ÷ 7 = 11 remainder 3, so 11 whole characters can be stored (1).

No marks0/1

11.4

Why: Near miss: gives a decimal result rather than the number of whole characters; the mark scheme does not accept 11.4.

No marks0/1

12

Why: Rounds up to 12, but 12 characters would need 84 bits, more than the 80 available; the mark scheme does not accept 12.

3Describe2 marksUser Management Swap Remove

An operating system manages the users of a computer.

Describe how an operating system checks that a user is allowed to log in.

[2 marks]
Mark scheme

Award up to two marks for a linked description such as:

  • The user enters a username/user ID and password/PIN (1) which is compared with the account details the operating system has stored (1)
  • The operating system keeps a file/list/database of users and their passwords (1) to check the login details the user enters against (1)
  • The operating system compares the entered details with the details stored for that user (1) and if they do not match, access is refused/denied (1)
  • The entered details are checked against the access rights stored for that user (1) so access is only allowed when the details are correct (1)

Do not award for 'it asks for a password' on its own, without saying what the password is checked against.

A stored list/file of users and passwords with no check of the login details earns one mark only.

Do not accept responses about file management, such as finding or opening the user's files.

Example answers and how they were marked
Full marks2/2

The user types in a username and password. The operating system compares these with the details it has stored for that account, and if they match the user is allowed to log in.

Why: Username and password entered (1) which is compared with the account details the operating system has stored (1).

Some marks1/2

The operating system has a list of all the users and their passwords.

Why: The stored list of users and passwords (1), but no check of the login details against it, so the development mark is not earned (0); the mark scheme states a list alone earns one mark only.

No marks0/2

The operating system finds the user's files on the hard drive and opens the last one they saved.

Why: Describes file management, not checking a user's login details; the mark scheme says not to accept responses about file management, so there is no creditworthy point.

4Discuss6 marksFetch Decode Execute Cycle Swap Remove

A school is upgrading the desktop computers in its computer science classroom. Each computer has a CPU, main memory and buses. The technician is explaining how the CPU uses these components during the fetch-decode-execute cycle.

Discuss how the CPU uses its components and the buses during the fetch-decode-execute cycle.

Your answer should consider:

  • the role of the CPU and registers
  • the role of the address bus, data bus and control bus
  • the role of the clock.
[6 marks]
Mark scheme

Indicative content

The role of the CPU and registers

  • The control unit decodes the instruction fetched from main memory and controls the other components during the cycle.
  • The ALU carries out arithmetic and logical operations during the execute stage, such as adding two values held in registers.
  • Registers hold the data, addresses and results that the CPU is working on during the cycle.
  • The program counter holds the address of the next instruction to be fetched, so it is incremented after each fetch.
  • The memory address register holds the address of the memory location that is about to be read or written.
  • The memory data register holds the instruction or data that has been fetched from or is being written to main memory.

The role of the address bus, data bus and control bus

  • The address bus carries the address of the memory location that the CPU needs to access from the CPU to main memory.
  • The address bus is one-way, so addresses are only sent from the CPU to main memory.
  • The data bus carries instructions and data between the CPU and main memory, so it is bi-directional.
  • The width of the data bus affects how many bits can be transferred at one time.
  • The control bus carries control signals such as read and write signals, so main memory knows whether the CPU wants to read an instruction or write data.
  • The control bus carries signals from the control unit to coordinate the components during the fetch-decode-execute cycle.

The role of the clock

  • The clock sends regular pulses that synchronise the actions of the CPU and main memory.
  • Each clock pulse triggers the next step of the fetch-decode-execute cycle, so the stages happen in the correct order.
  • The clock provides a regular timing signal so that the fetch-decode-execute cycle repeats at a steady rate.
  • The clock is separate from the control bus; the control bus carries control signals, while the clock provides timing pulses.
  • Do not credit the address bus storing addresses, the data bus storing data, or the control bus controlling the computer without naming a control signal; do not credit clock speed affecting performance as a role in the cycle.
  • Level 3 responses must cover all three bullets and link them to the fetch-decode-execute cycle; Level 2 answers may identify roles but link them only partly to the cycle.

Levels

  • Level 0 (0 marks): No rewardable content.
  • Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
  • Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
  • Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)
Example answers and how they were marked
Full marks6/6

The control unit decodes each instruction that is fetched from main memory and then controls the other components to execute it. The program counter holds the address of the next instruction, and this address is copied to the memory address register before it is sent along the address bus. The address bus carries this address from the CPU to main memory, and it is one-way. The data bus then carries the instruction back from main memory to the CPU; it is bi-directional, so it can also carry data to be written. The memory data register holds the instruction that has been fetched. The control bus carries read and write signals from the control unit, so memory knows whether the CPU wants to read an instruction or write data. During the execute stage, the ALU performs arithmetic or logical operations on data held in registers. The clock sends regular pulses that synchronise each stage, so one fetch, decode or execute step happens on each tick and the cycle repeats in the correct order.

Why: Comprehensive understanding of the CPU, registers, all three buses and the clock, with sustained application to the fetch-decode-execute cycle. Level 3.

Some marks4/6

The address bus carries the address of the next instruction from the program counter to main memory so it can be fetched. The data bus carries the instruction back to the CPU, and it is bi-directional. The control unit decodes the instruction. The clock sends pulses to keep the stages in order.

Why: Adequate understanding of some roles with some linkage to the fetch-decode-execute cycle, but the control bus, ALU and most registers are not covered. Level 2.

Some marks1/6

The data bus carries data between the CPU and RAM. The address bus stores the addresses that the CPU needs. The control bus controls the computer. The clock is the speed of the CPU.

Why: One basic, independent point (the data bus carries data) (1). The address bus does not store addresses, the control bus point names no control signal and clock speed is not a role in the cycle, so no further credit. Level 1.

Questions by topic

More ways to revise Edexcel GCSE Computer Science (1CP2)

Teachers: build a paper, print it with the mark schemes at the end, and sign your school up to set your classes activities on every topic.

Fetch Decode Explain isn't affiliated with or endorsed by Pearson Edexcel.