Edexcel GCSE Computer Science (1CP2) Exam Questions

• B To reduce the time taken to transmit a file (1)
• The only correct answer is B. The correct answer is to reduce the time taken to transmit a file.
• A is not correct because compression reduces file size, which can reduce the number of packets sent
• C is not correct because lossy compression can reduce the quality of a file
• D is not correct because encryption, not compression, can make a file harder to open

Award one mark for:

• Router (1)

Allow routers (plural).

Allow minor spelling errors that are clearly router, e.g. rooter.

Do not accept switch, hub (these forward data within a network, not between networks), modem or server.

Do not accept gateway on its own.

Award up to two marks for a linked description such as:

• The processor/CPU can only execute machine code/binary instructions (1) so the assembly instructions must be converted into machine code before the program can run (1)
• Each assembly instruction/mnemonic matches/corresponds to one machine code instruction (1) so each line must be replaced with the machine code the processor executes (1)
• The program is written using mnemonics (1) that must be translated into machine code for the processor to carry out the instructions (1)
• The hardware/processor does not understand assembly language directly (1) so it must be translated into machine code that the processor can execute (1)

Do not accept 'assembly language is a low-level language'.

Do not accept 'it is hard to understand' or 'it is not English'.

Do not accept benefits, such as 'machine code runs faster' or 'the program will run more quickly'.

Do not accept 'an assembler/a translator converts it' on its own, with no reference to the processor only being able to execute machine code/binary.

Do not accept responses about high-level languages or about compilers/interpreters.

Indicative content

The role of the CPU and registers

• The control unit decodes the instruction fetched from main memory and controls the other components during the cycle.
• The ALU carries out arithmetic and logical operations during the execute stage, such as adding two values held in registers.
• Registers hold the data, addresses and results that the CPU is working on during the cycle.
• The program counter holds the address of the next instruction to be fetched, so it is incremented after each fetch.
• The memory address register holds the address of the memory location that is about to be read or written.
• The memory data register holds the instruction or data that has been fetched from or is being written to main memory.

The role of the address bus, data bus and control bus

• The address bus carries the address of the memory location that the CPU needs to access from the CPU to main memory.
• The address bus is one-way, so addresses are only sent from the CPU to main memory.
• The data bus carries instructions and data between the CPU and main memory, so it is bi-directional.
• The width of the data bus affects how many bits can be transferred at one time.
• The control bus carries control signals such as read and write signals, so main memory knows whether the CPU wants to read an instruction or write data.
• The control bus carries signals from the control unit to coordinate the components during the fetch-decode-execute cycle.

The role of the clock

• The clock sends regular pulses that synchronise the actions of the CPU and main memory.
• Each clock pulse triggers the next step of the fetch-decode-execute cycle, so the stages happen in the correct order.
• The clock provides a regular timing signal so that the fetch-decode-execute cycle repeats at a steady rate.
• The clock is separate from the control bus; the control bus carries control signals, while the clock provides timing pulses.
• Do not credit the address bus storing addresses, the data bus storing data, or the control bus controlling the computer without naming a control signal; do not credit clock speed affecting performance as a role in the cycle.
• Level 3 responses must cover all three bullets and link them to the fetch-decode-execute cycle; Level 2 answers may identify roles but link them only partly to the cycle.

Levels

• Level 0 (0 marks): No rewardable content.
• Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
• Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
• Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)