Edexcel GCSE Computer Science (1CP2) Exam Questions

• B To reduce the time taken to transmit a file (1)
• The only correct answer is B. The correct answer is to reduce the time taken to transmit a file.
• A is not correct because compression reduces file size, which can reduce the number of packets sent
• C is not correct because lossy compression can reduce the quality of a file
• D is not correct because encryption, not compression, can make a file harder to open

• B The destination IP address (1)
• The only correct answer is B. The correct answer is the destination IP address.
• A is not correct because a domain name is converted to an IP address by a DNS server before routing begins
• C is not correct because the sender's MAC address is only used to deliver the packet on the local network
• D is not correct because the file name is not used to route packets

Award one mark for any of the following up to a maximum of two marks:

• (Only) 128 different characters can be represented / 7 bits give 2^7 = 128 different codes (1)
• It cannot represent characters from languages other than English / non-English alphabets, e.g. Greek, Chinese (1)
• It cannot represent accented characters, e.g. é, ñ (1)
• It cannot represent symbols or emoji that are not in the ASCII character set (1)

Award a maximum of one mark for the last three bullets, as they are all examples of characters that fall outside the 128 ASCII codes.

Allow 'it can only represent 128 characters, so some characters are missing' for the first bullet.

Do not accept 'it uses 7 bits' / 'it only uses 7 bits' on its own, without saying what this limits.

Do not accept 'it can only store a limited amount of text' / 'it can only store short messages', as 7 bits limits the number of characters available, not the length of a message.

Do not accept 'it can only represent the characters in the ASCII character set', as this repeats the question.

Do not accept 'it is old/out of date' or 'it cannot store numbers'.

Award one mark for each of:

• 5 × 1024^3 / 5 × 1024 × 1024 × 1024 / 5 × 2^30, for the number of bytes (1)
• A fully correct expression with × 8 to convert bytes to bits, in any order, e.g. 5 × 1024^3 × 8, 8 × 5 × 2^30 (1)

Accept 5 × 1 073 741 824 × 8.

Accept 5 × 2^33 or 42 949 672 960 as a fully correct expression (2 marks).

Do not accept 5 × 1000^3 × 8, which uses decimal multiples.

Do not accept ÷ 8, which converts bits to bytes.

Award up to two marks for a linked description such as:

• The user enters a username/user ID and password/PIN (1) which is compared with the account details the operating system has stored (1)
• The operating system keeps a file/list/database of users and their passwords (1) to check the login details the user enters against (1)
• The operating system compares the entered details with the details stored for that user (1) and if they do not match, access is refused/denied (1)
• The entered details are checked against the access rights stored for that user (1) so access is only allowed when the details are correct (1)

Do not award for 'it asks for a password' on its own, without saying what the password is checked against.

A stored list/file of users and passwords with no check of the login details earns one mark only.

Do not accept responses about file management, such as finding or opening the user's files.

Award up to two marks for a linked description such as:

• Instructions can manipulate/control the hardware/memory/registers directly (1) so the driver can control the specific device it is written for (1)
• The code is written for one specific processor/architecture (1) so it works with the exact hardware it will control (1)
• The programmer controls exactly how memory/registers are used (1) so the code is efficient and needs little memory, which suits a device that has limited memory (1)
• Each instruction maps to one machine code instruction (1) so the driver code is small enough to fit in the memory of the device (1)

Extra detail, such as naming the device the driver controls, is not needed to earn the marks.

Do not accept 'it is closer to machine code' on its own: it must be developed to show how this helps the driver, e.g. it can control the hardware directly.

Do not accept 'it is faster/quicker' with no link to the hardware/device, e.g. the device responds quickly.

Do not accept 'it is easier to learn', 'it is easier to debug' or 'it takes less time to write'.

Award one mark for each correct nibble in the correct order:

• 1100 (1)
• 0111 (1)

0 marks if the response is not 8-bit binary.

Indicative content

The role of the CPU and registers

• The control unit decodes the instruction fetched from main memory and controls the other components during the cycle.
• The ALU carries out arithmetic and logical operations during the execute stage, such as adding two values held in registers.
• Registers hold the data, addresses and results that the CPU is working on during the cycle.
• The program counter holds the address of the next instruction to be fetched, so it is incremented after each fetch.
• The memory address register holds the address of the memory location that is about to be read or written.
• The memory data register holds the instruction or data that has been fetched from or is being written to main memory.

The role of the address bus, data bus and control bus

• The address bus carries the address of the memory location that the CPU needs to access from the CPU to main memory.
• The address bus is one-way, so addresses are only sent from the CPU to main memory.
• The data bus carries instructions and data between the CPU and main memory, so it is bi-directional.
• The width of the data bus affects how many bits can be transferred at one time.
• The control bus carries control signals such as read and write signals, so main memory knows whether the CPU wants to read an instruction or write data.
• The control bus carries signals from the control unit to coordinate the components during the fetch-decode-execute cycle.

The role of the clock

• The clock sends regular pulses that synchronise the actions of the CPU and main memory.
• Each clock pulse triggers the next step of the fetch-decode-execute cycle, so the stages happen in the correct order.
• The clock provides a regular timing signal so that the fetch-decode-execute cycle repeats at a steady rate.
• The clock is separate from the control bus; the control bus carries control signals, while the clock provides timing pulses.
• Do not credit the address bus storing addresses, the data bus storing data, or the control bus controlling the computer without naming a control signal; do not credit clock speed affecting performance as a role in the cycle.
• Level 3 responses must cover all three bullets and link them to the fetch-decode-execute cycle; Level 2 answers may identify roles but link them only partly to the cycle.

Levels

• Level 0 (0 marks): No rewardable content.
• Level 1 (1–2 marks): Basic, independent points are made, showing elements of understanding of key concepts/principles of computer science. (AO1) The discussion will contain basic information with little linkage between points made or application to the context. (AO2)
• Level 2 (3–4 marks): Demonstrates adequate understanding of key concepts/principles of computer science. (AO1) The discussion shows some linkages and lines of reasoning with some structure and application to the context. (AO2)
• Level 3 (5–6 marks): Demonstrates comprehensive understanding of key concepts/principles of computer science to support the discussion being presented. (AO1) The discussion is well developed, with sustained lines of reasoning that are coherent and logically structured, and which clearly apply to the context. (AO2)