During the Fetch Decode Execute Cycle data and addresses need to move around parts of the CPU and between the CPU and memory, this is achieved using busses.
Busses are tiny wires built into the CPU and other components that allow data, instructions, and signals to move around.
There are 3 main busses:
| Bus | Purpose | Directionality |
| Address Bus | Carries addresses from the CPU to Memory. | Unidirectional |
| Data Bus | Carries data to and from Memory and the CPU | Bidirectional |
| Control Bus | Used by the control unit to send signals to different parts of the CPU. It uses the bus to control those parts and “tells them what to do” | Bidirectional |
Both the data bus and control bus are bidirectional, which means data can be sent and recieved over the bus in both directions. The address bus is unidirectional, meaning that addresses can be sent from the CPU to memory, but not back in the reverse direction.